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| author | Joey Castillo <jose.castillo@gmail.com> | 2021-10-19 10:14:24 -0400 |
|---|---|---|
| committer | Joey Castillo <jose.castillo@gmail.com> | 2021-10-19 10:14:24 -0400 |
| commit | 52c5747d2e873d4946d211c548c03498b72c1fb5 (patch) | |
| tree | d2c571b8583d75e956fe7b822ae9c9fdd637a21e /watch-library/config | |
| parent | 6210e1c233a3ee66274389e85889b0681102378d (diff) | |
| download | Sensor-Watch-52c5747d2e873d4946d211c548c03498b72c1fb5.tar.gz Sensor-Watch-52c5747d2e873d4946d211c548c03498b72c1fb5.tar.bz2 Sensor-Watch-52c5747d2e873d4946d211c548c03498b72c1fb5.zip | |
getting the sensor watch dev board working
Diffstat (limited to 'watch-library/config')
| -rw-r--r-- | watch-library/config/hpl_eic_config.h | 7 | ||||
| -rw-r--r-- | watch-library/config/hpl_gclk_config.h | 5 | ||||
| -rw-r--r-- | watch-library/config/hpl_osc32kctrl_config.h | 4 |
3 files changed, 15 insertions, 1 deletions
diff --git a/watch-library/config/hpl_eic_config.h b/watch-library/config/hpl_eic_config.h index 46aba150..53fee6cf 100644 --- a/watch-library/config/hpl_eic_config.h +++ b/watch-library/config/hpl_eic_config.h @@ -271,7 +271,7 @@ // <i> Indicates whether the external interrupt 5 filter is enabled or not // <id> eic_arch_filten5 #ifndef CONF_EIC_FILTEN5 -#define CONF_EIC_FILTEN5 0 +#define CONF_EIC_FILTEN5 1 #endif // <q> External Interrupt 5 Event Output Enable @@ -723,7 +723,12 @@ // </e> +// my god this is a hack. need to refactor this out of ASF and into our driver. - joey 10/19 +#ifdef CRYSTALLESS +#define CONFIG_EIC_EXTINT_MAP {2, PIN_PA02}, {5, PIN_PB05}, {7, PIN_PA07}, +#else #define CONFIG_EIC_EXTINT_MAP {2, PIN_PA02}, {6, PIN_PA22}, {7, PIN_PA23}, +#endif // <<< end of configuration section >>> diff --git a/watch-library/config/hpl_gclk_config.h b/watch-library/config/hpl_gclk_config.h index c56e2816..ee7aace3 100644 --- a/watch-library/config/hpl_gclk_config.h +++ b/watch-library/config/hpl_gclk_config.h @@ -248,9 +248,14 @@ // <i> This defines the clock source for generic clock generator 3 // <id> gclk_gen_3_oscillator #ifndef CONF_GCLK_GEN_3_SOURCE +#ifdef CRYSTALLESS +#define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_OSCULP32K +#else #define CONF_GCLK_GEN_3_SOURCE GCLK_GENCTRL_SRC_XOSC32K #endif +#endif + // <q> Run in Standby // <i> Indicates whether Run in Standby is enabled or not // <id> gclk_arch_gen_3_runstdby diff --git a/watch-library/config/hpl_osc32kctrl_config.h b/watch-library/config/hpl_osc32kctrl_config.h index 94b46617..540f1c60 100644 --- a/watch-library/config/hpl_osc32kctrl_config.h +++ b/watch-library/config/hpl_osc32kctrl_config.h @@ -17,8 +17,12 @@ // <i> This defines the clock source for RTC // <id> rtc_source_oscillator #ifndef CONF_RTCCTRL_SRC +#ifdef CRYSTALLESS +#define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_OSCULP32K +#else #define CONF_RTCCTRL_SRC GCLK_GENCTRL_SRC_XOSC32K #endif +#endif // <q> Use 1 kHz output // <id> rtc_1khz_selection |