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authorJoey Castillo <jose.castillo@gmail.com>2021-08-01 18:40:03 -0400
committerJoey Castillo <jose.castillo@gmail.com>2021-08-01 18:40:42 -0400
commit7e330befffdc2783207b83f12f30f328f5f3318d (patch)
tree92bc6d757d4dc0409d95b40efcd40ccd7372e049 /Sensor Watch Starter Project/hw
parenta547d78c1edfaeb9075934c87753b3352a4ece46 (diff)
downloadSensor-Watch-7e330befffdc2783207b83f12f30f328f5f3318d.tar.gz
Sensor-Watch-7e330befffdc2783207b83f12f30f328f5f3318d.tar.bz2
Sensor-Watch-7e330befffdc2783207b83f12f30f328f5f3318d.zip
move user application code to app folder
Diffstat (limited to 'Sensor Watch Starter Project/hw')
-rw-r--r--Sensor Watch Starter Project/hw/driver_init.c96
-rw-r--r--Sensor Watch Starter Project/hw/watch.c109
-rw-r--r--Sensor Watch Starter Project/hw/watch.h47
3 files changed, 93 insertions, 159 deletions
diff --git a/Sensor Watch Starter Project/hw/driver_init.c b/Sensor Watch Starter Project/hw/driver_init.c
index bbee2a1b..24f552ad 100644
--- a/Sensor Watch Starter Project/hw/driver_init.c
+++ b/Sensor Watch Starter Project/hw/driver_init.c
@@ -25,25 +25,6 @@ struct pwm_descriptor PWM_0;
struct pwm_descriptor PWM_1;
-void ADC_0_PORT_init(void)
-{
-
- // Disable digital pin circuitry
- gpio_set_pin_direction(A1, GPIO_DIRECTION_OFF);
-
- gpio_set_pin_function(A1, PINMUX_PB01B_ADC_AIN9);
-
- // Disable digital pin circuitry
- gpio_set_pin_direction(A2, GPIO_DIRECTION_OFF);
-
- gpio_set_pin_function(A2, PINMUX_PB02B_ADC_AIN10);
-
- // Disable digital pin circuitry
- gpio_set_pin_direction(A0, GPIO_DIRECTION_OFF);
-
- gpio_set_pin_function(A0, PINMUX_PB04B_ADC_AIN12);
-}
-
void ADC_0_CLOCK_init(void)
{
hri_mclk_set_APBCMASK_ADC_bit(MCLK);
@@ -53,12 +34,10 @@ void ADC_0_CLOCK_init(void)
void ADC_0_init(void)
{
ADC_0_CLOCK_init();
- ADC_0_PORT_init();
adc_sync_init(&ADC_0, ADC, (void *)NULL);
}
-void EXTERNAL_IRQ_0_init(void)
-{
+void EXTERNAL_IRQ_0_init(void) {
hri_gclk_write_PCHCTRL_reg(GCLK, EIC_GCLK_ID, CONF_GCLK_EIC_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_mclk_set_APBAMASK_EIC_bit(MCLK);
@@ -104,19 +83,16 @@ void EXTERNAL_IRQ_0_init(void)
ext_irq_init();
}
-void CALENDAR_0_CLOCK_init(void)
-{
+void CALENDAR_0_CLOCK_init(void) {
hri_mclk_set_APBAMASK_RTC_bit(MCLK);
}
-void CALENDAR_0_init(void)
-{
+void CALENDAR_0_init(void) {
CALENDAR_0_CLOCK_init();
calendar_init(&CALENDAR_0, RTC);
}
-void I2C_0_PORT_init(void)
-{
+void I2C_0_PORT_init(void) {
gpio_set_pin_pull_mode(SDA,
// <y> Pull configuration
@@ -139,129 +115,89 @@ void I2C_0_PORT_init(void)
gpio_set_pin_function(SCL, PINMUX_PB31C_SERCOM1_PAD1);
}
-void I2C_0_CLOCK_init(void)
-{
+void I2C_0_CLOCK_init(void) {
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_CORE, CONF_GCLK_SERCOM1_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM1_GCLK_ID_SLOW, CONF_GCLK_SERCOM1_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_mclk_set_APBCMASK_SERCOM1_bit(MCLK);
}
-void I2C_0_init(void)
-{
+void I2C_0_init(void) {
I2C_0_CLOCK_init();
i2c_m_sync_init(&I2C_0, SERCOM1);
I2C_0_PORT_init();
}
-void delay_driver_init(void)
-{
+void delay_driver_init(void) {
delay_init(SysTick);
}
-void PWM_0_PORT_init(void)
-{
-
+void PWM_0_PORT_init(void) {
gpio_set_pin_function(RED, PINMUX_PA20E_TC3_WO0);
-
gpio_set_pin_function(GREEN, PINMUX_PA21E_TC3_WO1);
}
-void PWM_0_CLOCK_init(void)
-{
+void PWM_0_CLOCK_init(void) {
hri_mclk_set_APBCMASK_TC3_bit(MCLK);
hri_gclk_write_PCHCTRL_reg(GCLK, TC3_GCLK_ID, CONF_GCLK_TC3_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
}
-void PWM_0_init(void)
-{
+void PWM_0_init(void) {
PWM_0_CLOCK_init();
PWM_0_PORT_init();
pwm_init(&PWM_0, TC3, _tc_get_pwm());
}
-void PWM_1_PORT_init(void)
-{
-
+void PWM_1_PORT_init(void) {
gpio_set_pin_function(BUZZER, PINMUX_PA27F_TCC0_WO5);
}
-void PWM_1_CLOCK_init(void)
-{
+void PWM_1_CLOCK_init(void) {
hri_mclk_set_APBCMASK_TCC0_bit(MCLK);
hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, CONF_GCLK_TCC0_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
}
-void PWM_1_init(void)
-{
+void PWM_1_init(void) {
PWM_1_CLOCK_init();
PWM_1_PORT_init();
pwm_init(&PWM_1, TCC0, _tcc_get_pwm());
}
-void SEGMENT_LCD_0_PORT_init(void)
-{
-
+void SEGMENT_LCD_0_PORT_init(void) {
gpio_set_pin_function(COM0, PINMUX_PB06B_SLCD_LP0);
-
gpio_set_pin_function(COM1, PINMUX_PB07B_SLCD_LP1);
-
gpio_set_pin_function(COM2, PINMUX_PB08B_SLCD_LP2);
-
gpio_set_pin_function(SEG0, PINMUX_PB09B_SLCD_LP3);
-
gpio_set_pin_function(SEG1, PINMUX_PA04B_SLCD_LP4);
-
gpio_set_pin_function(SEG2, PINMUX_PA05B_SLCD_LP5);
-
gpio_set_pin_function(SEG3, PINMUX_PA06B_SLCD_LP6);
-
gpio_set_pin_function(SEG4, PINMUX_PA07B_SLCD_LP7);
-
gpio_set_pin_function(SEG5, PINMUX_PA08B_SLCD_LP11);
-
gpio_set_pin_function(SEG6, PINMUX_PA09B_SLCD_LP12);
-
gpio_set_pin_function(SEG7, PINMUX_PA10B_SLCD_LP13);
-
gpio_set_pin_function(SEG8, PINMUX_PA11B_SLCD_LP14);
-
gpio_set_pin_function(SEG9, PINMUX_PB11B_SLCD_LP21);
-
gpio_set_pin_function(SEG10, PINMUX_PB12B_SLCD_LP22);
-
gpio_set_pin_function(SEG11, PINMUX_PB13B_SLCD_LP23);
-
gpio_set_pin_function(SEG12, PINMUX_PB14B_SLCD_LP24);
-
gpio_set_pin_function(SEG13, PINMUX_PB15B_SLCD_LP25);
-
gpio_set_pin_function(SEG14, PINMUX_PA12B_SLCD_LP28);
-
gpio_set_pin_function(SEG15, PINMUX_PA13B_SLCD_LP29);
-
gpio_set_pin_function(SEG16, PINMUX_PA14B_SLCD_LP30);
-
gpio_set_pin_function(SEG17, PINMUX_PA15B_SLCD_LP31);
-
gpio_set_pin_function(SEG18, PINMUX_PA16B_SLCD_LP32);
-
gpio_set_pin_function(SEG19, PINMUX_PA17B_SLCD_LP33);
-
gpio_set_pin_function(SEG20, PINMUX_PA18B_SLCD_LP34);
-
gpio_set_pin_function(SEG21, PINMUX_PA19B_SLCD_LP35);
-
gpio_set_pin_function(SEG22, PINMUX_PB16B_SLCD_LP42);
-
gpio_set_pin_function(SEG23, PINMUX_PB17B_SLCD_LP43);
}
+
/**
* \brief SLCD initialization function
*
* Enables SLCD peripheral, clocks and initializes SLCD driver
*/
-void SEGMENT_LCD_0_init(void)
-{
+void SEGMENT_LCD_0_init(void) {
hri_mclk_set_APBCMASK_SLCD_bit(SLCD);
slcd_sync_init(&SEGMENT_LCD_0, SLCD);
SEGMENT_LCD_0_PORT_init();
diff --git a/Sensor Watch Starter Project/hw/watch.c b/Sensor Watch Starter Project/hw/watch.c
index 45f814f8..e7a80339 100644
--- a/Sensor Watch Starter Project/hw/watch.c
+++ b/Sensor Watch Starter Project/hw/watch.c
@@ -7,19 +7,17 @@
#include "watch.h"
#include <stdlib.h>
-#include <string.h>
-void watch_init(Watch *watch) {
- memset(watch, 0, sizeof(*watch));
+void watch_init() {
// use switching regulator
SUPC->VREG.bit.SEL = 1;
while(!SUPC->STATUS.bit.VREGRDY);
- // TODO: use performance level 0
+ // TODO: use performance level 0?
// _set_performance_level(0);
// hri_pm_write_PLCFG_PLDIS_bit(PM, true);
}
-const uint8_t Character_Set[] =
+static const uint8_t Character_Set[] =
{
0b00000000, //
0b00000000, // !
@@ -118,39 +116,36 @@ const uint8_t Character_Set[] =
0b00000001, // ~
};
-void watch_enable_display(Watch *watch) {
- if (watch->display_enabled) return;
-
- static const uint64_t segmap[] = {
- 0x4e4f0e8e8f8d4d0d, // Position 8
- 0xc8c4c4c8b4b4b0b, // Position 9
- 0xc049c00a49890949, // Position 6
- 0xc048088886874707, // Position 7
- 0xc053921252139352, // Position 0
- 0xc054511415559594, // Position 1
- 0xc057965616179716, // Position 2
- 0xc041804000018a81, // Position 3
- 0xc043420203048382, // Position 4
- 0xc045440506468584, // Position 5
- };
- watch->num_chars = 10;
- watch->segment_map = &segmap[0];
+static const uint64_t Segment_Map[] = {
+ 0x4e4f0e8e8f8d4d0d, // Position 8
+ 0xc8c4c4c8b4b4b0b, // Position 9
+ 0xc049c00a49890949, // Position 6
+ 0xc048088886874707, // Position 7
+ 0xc053921252139352, // Position 0
+ 0xc054511415559594, // Position 1
+ 0xc057965616179716, // Position 2
+ 0xc041804000018a81, // Position 3
+ 0xc043420203048382, // Position 4
+ 0xc045440506468584, // Position 5
+};
+
+static const uint8_t Num_Chars = 10;
+void watch_enable_display() {
SEGMENT_LCD_0_init();
slcd_sync_enable(&SEGMENT_LCD_0);
- watch->display_enabled = true;
}
-void watch_display_pixel(Watch *watch, uint8_t com, uint8_t seg) {
+void watch_display_pixel(uint8_t com, uint8_t seg) {
slcd_sync_seg_on(&SEGMENT_LCD_0, SLCD_SEGID(com, seg));
}
-void watch_clear_pixel(Watch *watch, uint8_t com, uint8_t seg) {
+void watch_clear_pixel(uint8_t com, uint8_t seg) {
slcd_sync_seg_off(&SEGMENT_LCD_0, SLCD_SEGID(com, seg));
}
-void watch_display_character(Watch *watch, uint8_t character, uint8_t position) {
- uint64_t segmap = watch->segment_map[position];
+void watch_display_character(uint8_t character, uint8_t position) {
+ uint64_t segmap = Segment_Map[position];
uint64_t segdata = Character_Set[character - 0x20];
for (int i = 0; i < 8; i++) {
@@ -169,43 +164,40 @@ void watch_display_character(Watch *watch, uint8_t character, uint8_t position)
}
}
-void watch_display_string(Watch *watch, char *string, uint8_t position) {
+void watch_display_string(char *string, uint8_t position) {
size_t i = 0;
while(string[i] != 0) {
- watch_display_character(watch, string[i], position + i);
+ watch_display_character(string[i], position + i);
i++;
- if (i >= watch->num_chars) break;
+ if (i >= Num_Chars) break;
}
}
-void watch_enable_buttons(Watch *watch) {
+void watch_enable_buttons() {
EXTERNAL_IRQ_0_init();
}
-void watch_register_button_callback(Watch *watch, const uint32_t pin, ext_irq_cb_t callback) {
+void watch_register_button_callback(const uint32_t pin, ext_irq_cb_t callback) {
ext_irq_register(pin, callback);
}
-void watch_enable_led(Watch *watch) {
- if (watch->led_enabled) return;
+static bool PWM_0_enabled = false;
- PWM_0_init();
+void watch_enable_led() {
+ if (!PWM_0_enabled) PWM_0_init();
+ PWM_0_enabled = true;
pwm_set_parameters(&PWM_0, 10000, 0);
pwm_enable(&PWM_0);
- watch->led_enabled = true;
watch_set_led_off();
}
-void watch_disable_led(Watch *watch) {
- if (!watch->led_enabled) return;
-
+void watch_disable_led() {
gpio_set_pin_function(RED, GPIO_PIN_FUNCTION_OFF);
gpio_set_pin_function(GREEN, GPIO_PIN_FUNCTION_OFF);
pwm_disable(&PWM_0);
-
- watch->led_enabled = false;
+ PWM_0_enabled = false;
}
void watch_set_led_color(uint16_t red, uint16_t green) {
@@ -225,12 +217,9 @@ void watch_set_led_off() {
watch_set_led_color(0, 0);
}
-void watch_enable_date_time(Watch *watch) {
- if (watch->calendar_enabled) return;
+void watch_enable_date_time() {
CALENDAR_0_init();
calendar_enable(&CALENDAR_0);
-
- watch->calendar_enabled = true;
}
void watch_set_date_time(struct calendar_date_time date_time) {
@@ -248,15 +237,19 @@ static void tick_callback(struct calendar_dev *const dev) {
tick_user_callback();
}
-void watch_enable_tick(ext_irq_cb_t callback) {
+void watch_enable_tick_callback(ext_irq_cb_t callback) {
tick_user_callback = callback;
// TODO: rename this method to reflect that it now sets the PER7 interrupt.
_tamper_register_callback(&CALENDAR_0.device, &tick_callback);
}
-void watch_enable_analog(Watch *watch, const uint8_t pin) {
- if (!watch->adc_enabled) ADC_0_init();
+static bool ADC_0_ENABLED = false;
+
+void watch_enable_analog(const uint8_t pin) {
+ if (!ADC_0_ENABLED) ADC_0_init();
+ ADC_0_ENABLED = true;
+ gpio_set_pin_direction(pin, GPIO_DIRECTION_OFF);
switch (pin) {
case A0:
gpio_set_pin_function(A0, PINMUX_PB04B_ADC_AIN12);
@@ -270,7 +263,6 @@ void watch_enable_analog(Watch *watch, const uint8_t pin) {
default:
return;
}
- gpio_set_pin_direction(pin, GPIO_DIRECTION_OFF);
}
void watch_enable_digital_input(const uint8_t pin) {
@@ -278,15 +270,30 @@ void watch_enable_digital_input(const uint8_t pin) {
gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_OFF);
}
+void watch_enable_pull_up(const uint8_t pin) {
+ gpio_set_pin_pull_mode(pin, GPIO_PULL_UP);
+}
+
+void watch_enable_pull_down(const uint8_t pin) {
+ gpio_set_pin_pull_mode(pin, GPIO_PULL_DOWN);
+}
+
+bool watch_get_pin_level(const uint8_t pin, const bool level) {
+ return gpio_get_pin_level(pin);
+}
+
void watch_enable_digital_output(const uint8_t pin) {
gpio_set_pin_direction(pin, GPIO_DIRECTION_OUT);
gpio_set_pin_function(pin, GPIO_PIN_FUNCTION_OFF);
}
+void watch_set_pin_level(const uint8_t pin, const bool level) {
+ gpio_set_pin_level(pin, level);
+}
+
struct io_descriptor *I2C_0_io;
-void watch_enable_i2c(Watch *watch) {
- if (watch->i2c_enabled) return;
+void watch_enable_i2c() {
I2C_0_init();
i2c_m_sync_get_io_descriptor(&I2C_0, &I2C_0_io);
i2c_m_sync_enable(&I2C_0);
diff --git a/Sensor Watch Starter Project/hw/watch.h b/Sensor Watch Starter Project/hw/watch.h
index 53a0c111..be8d7936 100644
--- a/Sensor Watch Starter Project/hw/watch.h
+++ b/Sensor Watch Starter Project/hw/watch.h
@@ -13,50 +13,41 @@
#include "hpl_calendar.h"
#include "hal_ext_irq.h"
-typedef struct Watch {
- bool display_enabled;
- bool led_enabled;
- bool buzzer_enabled;
- bool calendar_enabled;
- bool adc_enabled;
- bool i2c_enabled;
- bool spi_enabled;
- bool eic_enabled;
-
- uint8_t num_chars;
- const uint64_t* segment_map;
-} Watch;
-
-void watch_init(Watch *watch);
-
-void watch_enable_display(Watch *watch);
-void watch_display_pixel(Watch *watch, uint8_t com, uint8_t seg);
-void watch_display_string(Watch *watch, char *string, uint8_t position);
-
-void watch_enable_led(Watch *watch);
-void watch_disable_led(Watch *watch);
+void watch_init();
+
+void watch_enable_display();
+void watch_display_pixel(uint8_t com, uint8_t seg);
+void watch_display_string(char *string, uint8_t position);
+
+void watch_enable_led();
+void watch_disable_led();
void watch_set_led_color(uint16_t red, uint16_t green);
void watch_set_led_red();
void watch_set_led_green();
void watch_set_led_off();
-void watch_enable_date_time(Watch *watch);
+void watch_enable_date_time();
void watch_set_date_time(struct calendar_date_time date_time);
void watch_get_date_time(struct calendar_date_time *date_time);
-void watch_enable_tick(ext_irq_cb_t callback);
+void watch_enable_tick_callback(ext_irq_cb_t callback);
-void watch_enable_analog(Watch *watch, const uint8_t pin);
+void watch_enable_analog(const uint8_t pin);
-void watch_enable_buttons(Watch *watch);
-void watch_register_button_callback(Watch *watch, const uint32_t pin, ext_irq_cb_t callback);
+void watch_enable_buttons();
+void watch_register_button_callback(const uint32_t pin, ext_irq_cb_t callback);
void watch_enable_digital_input(const uint8_t pin);
+void watch_enable_pull_up(const uint8_t pin);
+void watch_enable_pull_down(const uint8_t pin);
+bool watch_get_pin_level(const uint8_t pin, const bool level);
+
void watch_enable_digital_output(const uint8_t pin);
+void watch_set_pin_level(const uint8_t pin, const bool level);
struct io_descriptor *I2C_0_io;
-void watch_enable_i2c(Watch *watch);
+void watch_enable_i2c();
void watch_i2c_send(int16_t addr, uint8_t *buf, uint16_t length);
void watch_i2c_receive(int16_t addr, uint8_t *buf, uint16_t length);
lass="p">; /* in bytes */ static unsigned long *alloc_bitmap; #define PAGES_PER_MAPWORD (sizeof(unsigned long) * 8) #define allocated_in_map(_pn) \ ( !! (alloc_bitmap[(_pn)/PAGES_PER_MAPWORD] & \ (1UL<<((_pn)&(PAGES_PER_MAPWORD-1)))) ) /* * Hint regarding bitwise arithmetic in map_{alloc,free}: * -(1<<n) sets all bits >= n. * (1<<n)-1 sets all bits < n. * Variable names in map_{alloc,free}: * *_idx == Index into `alloc_bitmap' array. * *_off == Bit offset within an element of the `alloc_bitmap' array. */ static void map_alloc(unsigned long first_page, unsigned long nr_pages) { unsigned long start_off, end_off, curr_idx, end_idx; #ifndef NDEBUG unsigned long i; /* Check that the block isn't already allocated. */ for ( i = 0; i < nr_pages; i++ ) ASSERT(!allocated_in_map(first_page + i)); #endif curr_idx = first_page / PAGES_PER_MAPWORD; start_off = first_page & (PAGES_PER_MAPWORD-1); end_idx = (first_page + nr_pages) / PAGES_PER_MAPWORD; end_off = (first_page + nr_pages) & (PAGES_PER_MAPWORD-1); if ( curr_idx == end_idx ) { alloc_bitmap[curr_idx] |= ((1UL<<end_off)-1) & -(1UL<<start_off); } else { alloc_bitmap[curr_idx] |= -(1UL<<start_off); while ( ++curr_idx < end_idx ) alloc_bitmap[curr_idx] = ~0UL; alloc_bitmap[curr_idx] |= (1UL<<end_off)-1; } } static void map_free(unsigned long first_page, unsigned long nr_pages) { unsigned long start_off, end_off, curr_idx, end_idx; #ifndef NDEBUG unsigned long i; /* Check that the block isn't already freed. */ for ( i = 0; i < nr_pages; i++ ) ASSERT(allocated_in_map(first_page + i)); #endif curr_idx = first_page / PAGES_PER_MAPWORD; start_off = first_page & (PAGES_PER_MAPWORD-1); end_idx = (first_page + nr_pages) / PAGES_PER_MAPWORD; end_off = (first_page + nr_pages) & (PAGES_PER_MAPWORD-1); if ( curr_idx == end_idx ) { alloc_bitmap[curr_idx] &= -(1UL<<end_off) | ((1UL<<start_off)-1); } else { alloc_bitmap[curr_idx] &= (1UL<<start_off)-1; while ( ++curr_idx != end_idx ) alloc_bitmap[curr_idx] = 0; alloc_bitmap[curr_idx] &= -(1UL<<end_off); } } /************************* * BOOT-TIME ALLOCATOR */ /* Initialise allocator to handle up to @max_page pages. */ unsigned long init_boot_allocator(unsigned long bitmap_start) { bitmap_start = round_pgup(bitmap_start); /* Allocate space for the allocation bitmap. */ bitmap_size = max_page / 8; bitmap_size = round_pgup(bitmap_size); alloc_bitmap = (unsigned long *)phys_to_virt(bitmap_start); /* All allocated by default. */ memset(alloc_bitmap, ~0, bitmap_size); return bitmap_start + bitmap_size; } void init_boot_pages(unsigned long ps, unsigned long pe) { unsigned long bad_pfn; char *p; ps = round_pgup(ps); pe = round_pgdown(pe); if ( pe <= ps ) return; map_free(ps >> PAGE_SHIFT, (pe - ps) >> PAGE_SHIFT); /* Check new pages against the bad-page list. */ p = opt_badpage; while ( *p != '\0' ) { bad_pfn = simple_strtoul(p, &p, 0); if ( *p == ',' ) p++; else if ( *p != '\0' ) break; if ( (bad_pfn < (bitmap_size*8)) && !allocated_in_map(bad_pfn) ) { printk("Marking page %lx as bad\n", bad_pfn); map_alloc(bad_pfn, 1); } } } unsigned long alloc_boot_pages(unsigned long size, unsigned long align) { unsigned long pg, i; size = round_pgup(size) >> PAGE_SHIFT; align = round_pgup(align) >> PAGE_SHIFT; for ( pg = 0; (pg + size) < (bitmap_size*8); pg += align ) { for ( i = 0; i < size; i++ ) if ( allocated_in_map(pg + i) ) break; if ( i == size ) { map_alloc(pg, size); return pg << PAGE_SHIFT; } } return 0; } /************************* * BINARY BUDDY ALLOCATOR */ #define MEMZONE_XEN 0 #define MEMZONE_DOM 1 #define NR_ZONES 2 /* Up to 2^20 pages can be allocated at once. */ #define MAX_ORDER 20 static struct list_head heap[NR_ZONES][MAX_ORDER+1]; static unsigned long avail[NR_ZONES]; static spinlock_t heap_lock = SPIN_LOCK_UNLOCKED; void end_boot_allocator(void) { unsigned long i, j; int curr_free = 0, next_free = 0; memset(avail, 0, sizeof(avail)); for ( i = 0; i < NR_ZONES; i++ ) for ( j = 0; j <= MAX_ORDER; j++ ) INIT_LIST_HEAD(&heap[i][j]); /* Pages that are free now go to the domain sub-allocator. */ for ( i = 0; i < max_page; i++ ) { curr_free = next_free; next_free = !allocated_in_map(i+1); if ( next_free ) map_alloc(i+1, 1); /* prevent merging in free_heap_pages() */ if ( curr_free ) free_heap_pages(MEMZONE_DOM, pfn_to_page(i), 0); } } /* Hand the specified arbitrary page range to the specified heap zone. */ void init_heap_pages( unsigned int zone, struct pfn_info *pg, unsigned long nr_pages) { unsigned long i; ASSERT(zone < NR_ZONES); for ( i = 0; i < nr_pages; i++ ) free_heap_pages(zone, pg+i, 0); } /* Allocate 2^@order contiguous pages. */ struct pfn_info *alloc_heap_pages(unsigned int zone, unsigned int order) { int i; struct pfn_info *pg; ASSERT(zone < NR_ZONES); if ( unlikely(order > MAX_ORDER) ) return NULL; spin_lock(&heap_lock); /* Find smallest order which can satisfy the request. */ for ( i = order; i <= MAX_ORDER; i++ ) if ( !list_empty(&heap[zone][i]) ) goto found; /* No suitable memory blocks. Fail the request. */ spin_unlock(&heap_lock); return NULL; found: pg = list_entry(heap[zone][i].next, struct pfn_info, list); list_del(&pg->list); /* We may have to halve the chunk a number of times. */ while ( i != order ) { PFN_ORDER(pg) = --i; list_add_tail(&pg->list, &heap[zone][i]); pg += 1 << i; } map_alloc(page_to_pfn(pg), 1 << order); avail[zone] -= 1 << order; spin_unlock(&heap_lock); return pg; } /* Free 2^@order set of pages. */ void free_heap_pages( unsigned int zone, struct pfn_info *pg, unsigned int order) { unsigned long mask; ASSERT(zone < NR_ZONES); ASSERT(order <= MAX_ORDER); spin_lock(&heap_lock); map_free(page_to_pfn(pg), 1 << order); avail[zone] += 1 << order; /* Merge chunks as far as possible. */ while ( order < MAX_ORDER ) { mask = 1 << order; if ( (page_to_pfn(pg) & mask) ) { /* Merge with predecessor block? */ if ( allocated_in_map(page_to_pfn(pg)-mask) || (PFN_ORDER(pg-mask) != order) ) break; list_del(&(pg-mask)->list); pg -= mask; } else { /* Merge with successor block? */ if ( allocated_in_map(page_to_pfn(pg)+mask) || (PFN_ORDER(pg+mask) != order) ) break; list_del(&(pg+mask)->list); } order++; } PFN_ORDER(pg) = order; list_add_tail(&pg->list, &heap[zone][order]); spin_unlock(&heap_lock); } /* * Scrub all unallocated pages in all heap zones. This function is more * convoluted than appears necessary because we do not want to continuously * hold the lock or disable interrupts while scrubbing very large memory areas. */ void scrub_heap_pages(void) { void *p; unsigned long pfn, flags; printk("Scrubbing Free RAM: "); watchdog_disable(); for ( pfn = 0; pfn < (bitmap_size * 8); pfn++ ) { /* Every 100MB, print a progress dot. */ if ( (pfn % ((100*1024*1024)/PAGE_SIZE)) == 0 ) printk("."); /* Quick lock-free check. */ if ( allocated_in_map(pfn) ) continue; spin_lock_irqsave(&heap_lock, flags); /* Re-check page status with lock held. */ if ( !allocated_in_map(pfn) ) { if ( IS_XEN_HEAP_FRAME(pfn_to_page(pfn)) ) { p = page_to_virt(pfn_to_page(pfn)); memguard_unguard_range(p, PAGE_SIZE); clear_page(p); memguard_guard_range(p, PAGE_SIZE); } else { p = map_domain_mem(pfn << PAGE_SHIFT); clear_page(p); unmap_domain_mem(p); } } spin_unlock_irqrestore(&heap_lock, flags); } watchdog_enable(); printk("done.\n"); } /************************* * XEN-HEAP SUB-ALLOCATOR */ void init_xenheap_pages(unsigned long ps, unsigned long pe) { unsigned long flags; ps = round_pgup(ps); pe = round_pgdown(pe); memguard_guard_range(__va(ps), pe - ps); /* * Yuk! Ensure there is a one-page buffer between Xen and Dom zones, to * prevent merging of power-of-two blocks across the zone boundary. */ if ( !IS_XEN_HEAP_FRAME(phys_to_page(pe)) ) pe -= PAGE_SIZE; local_irq_save(flags); init_heap_pages(MEMZONE_XEN, phys_to_page(ps), (pe - ps) >> PAGE_SHIFT); local_irq_restore(flags); } unsigned long alloc_xenheap_pages(unsigned int order) { unsigned long flags; struct pfn_info *pg; int i; local_irq_save(flags); pg = alloc_heap_pages(MEMZONE_XEN, order); local_irq_restore(flags); if ( unlikely(pg == NULL) ) goto no_memory; memguard_unguard_range(page_to_virt(pg), 1 << (order + PAGE_SHIFT)); for ( i = 0; i < (1 << order); i++ ) { pg[i].count_info = 0; pg[i].u.inuse._domain = 0; pg[i].u.inuse.type_info = 0; } return (unsigned long)page_to_virt(pg); no_memory: printk("Cannot handle page request order %d!\n", order); return 0; } void free_xenheap_pages(unsigned long p, unsigned int order) { unsigned long flags; memguard_guard_range((void *)p, 1 << (order + PAGE_SHIFT));