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| author | Joey Castillo <joeycastillo@utexas.edu> | 2022-04-10 15:07:58 -0400 |
|---|---|---|
| committer | Joey Castillo <joeycastillo@utexas.edu> | 2022-04-10 15:08:47 -0400 |
| commit | 405f010ade01fc337e9dbf9728260783ad62f4a3 (patch) | |
| tree | 0c54e42191079577c054ccc00254804c34258ef3 | |
| parent | 7b06d7d6fdbbf282ea32cfd0871e6b0310a08d0c (diff) | |
| download | Sensor-Watch-405f010ade01fc337e9dbf9728260783ad62f4a3.tar.gz Sensor-Watch-405f010ade01fc337e9dbf9728260783ad62f4a3.tar.bz2 Sensor-Watch-405f010ade01fc337e9dbf9728260783ad62f4a3.zip | |
static analysis: add comments to empty while loops
| -rw-r--r-- | watch-library/hardware/watch/watch_adc.c | 2 | ||||
| -rw-r--r-- | watch-library/hardware/watch/watch_deepsleep.c | 2 | ||||
| -rw-r--r-- | watch-library/hardware/watch/watch_private.c | 6 |
3 files changed, 5 insertions, 5 deletions
diff --git a/watch-library/hardware/watch/watch_adc.c b/watch-library/hardware/watch/watch_adc.c index c8c4d65a..476f0cbb 100644 --- a/watch-library/hardware/watch/watch_adc.c +++ b/watch-library/hardware/watch/watch_adc.c @@ -36,7 +36,7 @@ static uint16_t _watch_get_analog_value(uint16_t channel) { } ADC->SWTRIG.bit.START = 1; - while (!ADC->INTFLAG.bit.RESRDY); + while (!ADC->INTFLAG.bit.RESRDY); // wait for "result ready" flag return ADC->RESULT.reg; } diff --git a/watch-library/hardware/watch/watch_deepsleep.c b/watch-library/hardware/watch/watch_deepsleep.c index e3f654f2..b1b5b2c9 100644 --- a/watch-library/hardware/watch/watch_deepsleep.c +++ b/watch-library/hardware/watch/watch_deepsleep.c @@ -69,7 +69,7 @@ void watch_register_extwake_callback(uint8_t pin, ext_irq_cb_t callback, bool le // disable the RTC RTC->MODE2.CTRLA.bit.ENABLE = 0; - while (RTC->MODE2.SYNCBUSY.bit.ENABLE); + while (RTC->MODE2.SYNCBUSY.bit.ENABLE); // wait for RTC to be disabled // update the configuration RTC->MODE2.TAMPCTRL.reg = config; diff --git a/watch-library/hardware/watch/watch_private.c b/watch-library/hardware/watch/watch_private.c index 241ff40a..2bb3d812 100644 --- a/watch-library/hardware/watch/watch_private.c +++ b/watch-library/hardware/watch/watch_private.c @@ -35,7 +35,7 @@ void _watch_init(void) { // Use switching regulator for lower power consumption. SUPC->VREG.bit.SEL = 1; - while(!SUPC->STATUS.bit.VREGRDY); + while(!SUPC->STATUS.bit.VREGRDY); // wait for voltage regulator to become ready // check the battery voltage... watch_enable_adc(); @@ -63,7 +63,7 @@ void _watch_init(void) { SUPC->BOD33.bit.LEVEL = 34; // Detect brownout at 2.6V (1.445V + level * 34mV) SUPC->BOD33.bit.ACTION = 0x2; // Generate an interrupt when BOD33 is triggered SUPC->BOD33.bit.HYST = 0; // Disable hysteresis - while(!SUPC->STATUS.bit.B33SRDY); + while(!SUPC->STATUS.bit.B33SRDY); // wait for BOD33 to sync // Enable interrupt on BOD33 detect SUPC->INTENSET.bit.BOD33DET = 1; @@ -198,7 +198,7 @@ void _watch_enable_usb(void) { // assign DFLL to GCLK1 GCLK->GENCTRL[1].reg = GCLK_GENCTRL_SRC(GCLK_GENCTRL_SRC_DFLL48M) | GCLK_GENCTRL_DIV(1) | GCLK_GENCTRL_GENEN;// | GCLK_GENCTRL_OE; - while (GCLK->SYNCBUSY.bit.GENCTRL1); + while (GCLK->SYNCBUSY.bit.GENCTRL1); // wait for generator control 1 to sync // assign GCLK1 to USB hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); |