#include "project.h"

#define BUFFER_SIZE 256
#define BIG_BUFFER_SIZE 600


volatile ring_t usart2_rx_ring;
static uint8_t usart2_rx_ring_buf[BUFFER_SIZE];

volatile ring_t usart2_tx_ring;
static uint8_t usart2_tx_ring_buf[BUFFER_SIZE];

volatile ring_t usart1_rx_ring;
static uint8_t usart1_rx_ring_buf[BUFFER_SIZE];

volatile ring_t usart1_tx_ring;
static uint8_t usart1_tx_ring_buf[BUFFER_SIZE];


#define TX1   GPIO9
#define TX1_PORT  GPIOA

#define RX1   GPIO10
#define RX1_PORT  GPIOA

#define TX2   GPIO5
#define TX2_PORT  GPIOD

#define RX2   GPIO6
#define RX2_PORT  GPIOD

#define RX2_EN   GPIO4
#define RX2_EN_PORT  GPIOG

void usart2_isr (void)
{
  uint8_t data;

  /* Check if we were called because of RXNE. */
  if (((USART_CR1 (USART2) & USART_CR1_RXNEIE) != 0) &&
      ((USART_SR (USART2) & USART_SR_RXNE) != 0)) {

    /* Retrieve the data from the peripheral. */
    data = usart_recv (USART2);

    ring_write_byte (&usart2_rx_ring, data);
    //usart6_queue(data);
  }

  /* Check if we were called because of TXE. */
  if (((USART_CR1 (USART2) & USART_CR1_TXEIE) != 0) &&
      ((USART_SR (USART2) & USART_SR_TXE) != 0)) {

    if (ring_read_byte (&usart2_tx_ring, &data)) {
      /*No more data, Disable the TXE interrupt, it's no longer needed. */
      usart_disable_tx_interrupt (USART2);
    } else
      usart_send_blocking (USART2, data);
  }

}

void
usart2_queue (uint8_t d)
{
  ring_write_byte (&usart2_tx_ring, d);
  usart_enable_tx_interrupt (USART2);
}

void
usart2_drain (void)
{
  while (!ring_empty (&usart2_tx_ring));
}


int
usart2_write (char *ptr, int len, int blocking)
{
  int ret;

  ret = ring_write (&usart2_tx_ring, (uint8_t *) ptr, len, blocking);
  usart_enable_tx_interrupt (USART2);
  return ret;
}



void usart1_isr (void)
{
  uint8_t data;

  /* Check if we were called because of RXNE. */
  if (((USART_CR1 (USART1) & USART_CR1_RXNEIE) != 0) &&
      ((USART_SR (USART1) & USART_SR_RXNE) != 0)) {

    /* Retrieve the data from the peripheral. */
    data = usart_recv (USART1);

    ring_write_byte (&usart1_rx_ring, data);
  }

  /* Check if we were called because of TXE. */
  if (((USART_CR1 (USART1) & USART_CR1_TXEIE) != 0) &&
      ((USART_SR (USART1) & USART_SR_TXE) != 0)) {

    if (ring_read_byte (&usart1_tx_ring, &data)) {
      /*No more data, Disable the TXE interrupt, it's no longer needed. */
      usart_disable_tx_interrupt (USART1);
    } else
      usart_send_blocking (USART1, data);
  }

}

void
usart1_queue (uint8_t d)
{
  ring_write_byte (&usart1_tx_ring, d);
  usart_enable_tx_interrupt (USART1);
}

void
usart1_drain (void)
{
  while (!ring_empty (&usart1_tx_ring));
}


int
usart1_write (char *ptr, int len, int blocking)
{
  int ret;

  ret = ring_write (&usart1_tx_ring, (uint8_t *) ptr, len, blocking);
  usart_enable_tx_interrupt (USART1);
  return ret;
}

void usart_rings_init (void)
{
  ring_init (&usart1_rx_ring, usart1_rx_ring_buf, sizeof (usart1_rx_ring_buf));
  ring_init (&usart1_tx_ring, usart1_tx_ring_buf, sizeof (usart1_tx_ring_buf));
  ring_init (&usart2_rx_ring, usart2_rx_ring_buf, sizeof (usart2_rx_ring_buf));
  ring_init (&usart2_tx_ring, usart2_tx_ring_buf, sizeof (usart2_tx_ring_buf));
}

void
usart_init (void)
{


  MAP_OUTPUT_PP (RX2_EN);
  SET (RX2_EN);

  MAP_INPUT (RX2);
  MAP_AF (TX2, GPIO_AF7);
  MAP_AF_PU (RX2, GPIO_AF7);

  usart_set_baudrate (USART2, 38400);
  usart_set_databits (USART2, 8);
  usart_set_stopbits (USART2, USART_STOPBITS_1);
  usart_set_parity (USART2, USART_PARITY_NONE);
  usart_set_flow_control (USART2, USART_FLOWCONTROL_NONE);
  usart_set_mode (USART2, USART_MODE_TX_RX);

  usart_enable_rx_interrupt (USART2);

  usart_enable (USART2);

  nvic_enable_irq (NVIC_USART2_IRQ);



  MAP_INPUT (RX1);
  MAP_AF (TX1, GPIO_AF7);
  MAP_AF_PU (RX1, GPIO_AF7);

  usart_set_baudrate (USART1, 9600);
  usart_set_databits (USART1, 8);
  usart_set_stopbits (USART1, USART_STOPBITS_1);
  usart_set_parity (USART1, USART_PARITY_NONE);
  usart_set_flow_control (USART1, USART_FLOWCONTROL_NONE);
  usart_set_mode (USART1, USART_MODE_TX_RX);

  usart_enable_rx_interrupt (USART1);

  usart_enable (USART1);

  nvic_enable_irq (NVIC_USART1_IRQ);
}