From 0548136a4c886830414fb575d9d0daa7f1a7d170 Mon Sep 17 00:00:00 2001 From: fishsoupisgood Date: Wed, 8 May 2019 23:17:01 +0100 Subject: sysclk back to 168MHz, 10Mhz -> TIM2 --- app/abs.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 59 insertions(+), 3 deletions(-) (limited to 'app/abs.c') diff --git a/app/abs.c b/app/abs.c index 2ed8dd4..7a6b5d5 100644 --- a/app/abs.c +++ b/app/abs.c @@ -3,11 +3,14 @@ static uint32_t high_tick; +#if HW_CLOCK_LEN == 32 + #define QUARTER (1UL << 29) #define HALF (1UL << 30) #define THREE_QUARTERS (HALF+QUARTER) #define ONE (~(uint32_t)0) + uint64_t abs_extend (uint32_t now) { static int m; @@ -25,9 +28,7 @@ uint64_t abs_extend (uint32_t now) m = 1; } - } else { - if (now < HALF) { ret = high_tick; ret <<= 32; @@ -44,6 +45,61 @@ uint64_t abs_extend (uint32_t now) return ret; } +#elif HW_CLOCK_LEN == 31 + +#define QUARTER (1UL << 28) +#define HALF (1UL << 29) +#define THREE_QUARTERS (HALF+QUARTER) +#define ONE (0x7fffffff) + + +uint64_t abs_extend (uint32_t now) +{ + static int m; + uint64_t ret; + + + if (!m) { + ret = high_tick; + ret <<= 31; + ret |= now; + + if ((now > THREE_QUARTERS) && (now <= ONE)) { + high_tick++; + m = 1; + } + + } else { + if (now < HALF) { + ret = high_tick; + ret <<= 31; + ret |= now; + } else { + ret = high_tick - 1; + ret <<= 31; + ret |= now; + } + + if ((now > QUARTER) && (now < HALF)) + m = 0; + } + + return ret; +} + + + + + +#else +#error unknown hardware clock length +#endif + + + + + + void abs_meh (void) @@ -57,7 +113,7 @@ void abs_meh (void) uint64_t abs_get (void) { - uint32_t now = SCS_DWT_CYCCNT; + uint32_t now = HW_CLOCK_REG; return abs_extend (now); } -- cgit v1.2.3