/* * Generate definitions needed by assembly language modules. * This code generates raw asm output which is post-processed * to extract and format the required data. */ #include #include #include #include #include #include #include #define task_struct vcpu #define DEFINE(sym, val) \ asm volatile("\n->" #sym " (%0) " #val : : "i" (val)) #define BLANK() asm volatile("\n->" : : ) #define OFFSET(_sym, _str, _mem) \ DEFINE(_sym, offsetof(_str, _mem)); void foo(void) { DEFINE(IA64_TASK_SIZE, sizeof (struct task_struct)); DEFINE(IA64_THREAD_INFO_SIZE, sizeof (struct thread_info)); DEFINE(IA64_PT_REGS_SIZE, sizeof (struct pt_regs)); DEFINE(IA64_SWITCH_STACK_SIZE, sizeof (struct switch_stack)); //DEFINE(IA64_SIGINFO_SIZE, sizeof (struct siginfo)); DEFINE(IA64_CPU_SIZE, sizeof (struct cpuinfo_ia64)); //DEFINE(SIGFRAME_SIZE, sizeof (struct sigframe)); DEFINE(UNW_FRAME_INFO_SIZE, sizeof (struct unw_frame_info)); BLANK(); #ifdef VTI_DEBUG DEFINE(IVT_CUR_OFS, offsetof(struct vcpu, arch.arch_vmx.ivt_current)); DEFINE(IVT_DBG_OFS, offsetof(struct vcpu, arch.arch_vmx.ivt_debug)); #endif DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); BLANK(); DEFINE(XSI_PSR_IC_OFS, offsetof(mapped_regs_t, interrupt_collection_enabled)); DEFINE(XSI_PSR_IC, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, interrupt_collection_enabled))); DEFINE(XSI_PSR_I_OFS, offsetof(mapped_regs_t, interrupt_delivery_enabled)); DEFINE(XSI_IIP_OFS, offsetof(mapped_regs_t, iip)); DEFINE(XSI_IIP, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, iip))); DEFINE(XSI_IFA_OFS, offsetof(mapped_regs_t, ifa)); DEFINE(XSI_IFA, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifa))); DEFINE(XSI_ITIR_OFS, offsetof(mapped_regs_t, itir)); DEFINE(XSI_ITIR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, itir))); DEFINE(XSI_IPSR, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ipsr))); DEFINE(XSI_IPSR_OFS, offsetof(mapped_regs_t, ipsr)); DEFINE(XSI_IFS_OFS, offsetof(mapped_regs_t, ifs)); DEFINE(XSI_IFS, (SHARED_ARCHINFO_ADDR+offsetof(mapped_regs_t, ifs))); DEFINE(XSI_ISR_OFS, offsetof(mapped_regs_t, isr)); DEFINE(XSI_IIM_OFS, offsetof(mapped_regs_t, iim)); DEFINE(XSI_BANKNUM_OFS, offsetof(mapped_regs_t, banknum)); DEFINE(XSI_BANK0_OFS, offsetof(mapped_regs_t, bank0_regs[0])); DEFINE(XSI_BANK1_OFS, offsetof(mapped_regs_t, bank1_regs[0])); DEFINE(XSI_B0NATS_OFS, offsetof(mapped_regs_t, vbnat)); DEFINE(XSI_B1NATS_OFS, offsetof(mapped_regs_t, vnat)); DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0])); DEFINE(XSI_METAPHYS_OFS, offsetof(mapped_regs_t, metaphysical_mode)); DEFINE(XSI_PRECOVER_IFS_OFS, offsetof(mapped_regs_t, precover_ifs)); DEFINE(XSI_INCOMPL_REG_OFS, offsetof(mapped_regs_t, incomplete_regframe)); DEFINE(XSI_PEND_OFS, offsetof(mapped_regs_t, pending_interruption)); DEFINE(XSI_RR0_OFS, offsetof(mapped_regs_t, rrs[0])); DEFINE(XSI_IHA_OFS, offsetof(mapped_regs_t, iha)); DEFINE(XSI_TPR_OFS, offsetof(mapped_regs_t, tpr)); DEFINE(XSI_PTA_OFS, offsetof(mapped_regs_t, pta)); DEFINE(XSI_ITV_OFS, offsetof(mapped_regs_t, itv)); DEFINE(XSI_KR0_OFS, offsetof(mapped_regs_t, krs[0])); //DEFINE(IA64_TASK_BLOCKED_OFFSET,offsetof (struct task_struct, blocked)); //DEFINE(IA64_TASK_CLEAR_CHILD_TID_OFFSET,offsetof (struct task_struct, clear_child_tid)); //DEFINE(IA64_TASK_GROUP_LEADER_OFFSET, offsetof (struct task_struct, group_leader)); //DEFINE(IA64_TASK_PENDING_OFFSET,offsetof (struct task_struct, pending)); //DEFINE(IA64_TASK_PID_OFFSET, offsetof (struct task_struct, pid)); //DEFINE(IA64_TASK_REAL_PARENT_OFFSET, offsetof (struct task_struct, real_parent)); //DEFINE(IA64_TASK_SIGHAND_OFFSET,offsetof (struct task_struct, sighand)); //DEFINE(IA64_TASK_SIGNAL_OFFSET,offsetof (struct task_struct, signal)); //DEFINE(IA64_TASK_TGID_OFFSET, offsetof (struct task_struct, tgid)); DEFINE(IA64_PGD, offsetof(struct domain, arch.mm)); DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct vcpu, arch._thread.ksp)); DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct vcpu, arch._thread.on_ustack)); DEFINE(IA64_VCPU_DOMAIN_OFFSET, offsetof (struct vcpu, domain)); DEFINE(IA64_VCPU_META_RR0_OFFSET, offsetof (struct vcpu, arch.metaphysical_rr0)); DEFINE(IA64_VCPU_META_SAVED_RR0_OFFSET, offsetof (struct vcpu, arch.metaphysical_saved_rr0)); DEFINE(IA64_VCPU_BREAKIMM_OFFSET, offsetof (struct vcpu, arch.breakimm)); DEFINE(IA64_VCPU_IVA_OFFSET, offsetof (struct vcpu, arch.iva)); DEFINE(IA64_VCPU_DTLB_PTE_OFFSET, offsetof (struct vcpu, arch.dtlb_pte)); DEFINE(IA64_VCPU_ITLB_PTE_OFFSET, offsetof (struct vcpu, arch.itlb_pte)); DEFINE(IA64_VCPU_IRR0_OFFSET, offsetof (struct vcpu, arch.irr[0])); DEFINE(IA64_VCPU_IRR3_OFFSET, offsetof (struct vcpu, arch.irr[3])); DEFINE(IA64_VCPU_INSVC3_OFFSET, offsetof (struct vcpu, arch.insvc[3])); DEFINE(IA64_VCPU_STARTING_RID_OFFSET, offsetof (struct vcpu, arch.starting_rid)); DEFINE(IA64_VCPU_ENDING_RID_OFFSET, offsetof (struct vcpu, arch.ending_rid)); DEFINE(IA64_VCPU_DOMAIN_ITM_OFFSET, offsetof (struct vcpu, arch.domain_itm)); DEFINE(IA64_VCPU_DOMAIN_ITM_LAST_OFFSET, offsetof (struct vcpu, arch.domain_itm_last)); DEFINE(IA64_VCPU_ITLB_OFFSET, offsetof (struct vcpu, arch.itlb)); DEFINE(IA64_VCPU_DTLB_OFFSET, offsetof (struct vcpu, arch.dtlb)); BLANK(); DEFINE(IA64_CPUINFO_ITM_NEXT_OFFSET, offsetof (struct cpuinfo_ia64, itm_next)); DEFINE(IA64_CPUINFO_KSOFTIRQD_OFFSET, offsetof (struct cpuinfo_ia64, ksoftirqd)); //DEFINE(IA64_SIGHAND_SIGLOCK_OFFSET,offsetof (struct sighand_struct, siglock)); BLANK(); //DEFINE(IA64_SIGNAL_GROUP_STOP_COUNT_OFFSET,offsetof (struct signal_struct, //group_stop_count)); //DEFINE(IA64_SIGNAL_SHARED_PENDING_OFFSET,offsetof (struct signal_struct, shared_pending)); BLANK(); DEFINE(IA64_PT_REGS_B6_OFFSET, offsetof (struct pt_regs, b6)); DEFINE(IA64_PT_REGS_B7_OFFSET, offsetof (struct pt_regs, b7)); DEFINE(IA64_PT_REGS_AR_CSD_OFFSET, offsetof (struct pt_regs, ar_csd)); DEFINE(IA64_PT_REGS_AR_SSD_OFFSET, offsetof (struct pt_regs, ar_ssd)); DEFINE(IA64_PT_REGS_R8_OFFSET, offsetof (struct pt_regs, r8)); DEFINE(IA64_PT_REGS_R9_OFFSET, offsetof (struct pt_regs, r9)); DEFINE(IA64_PT_REGS_R10_OFFSET, offsetof (struct pt_regs, r10)); DEFINE(IA64_PT_REGS_R11_OFFSET, offsetof (struct pt_regs, r11)); DEFINE(IA64_PT_REGS_CR_IPSR_OFFSET, offsetof (struct pt_regs, cr_ipsr)); DEFINE(IA64_PT_REGS_CR_IIP_OFFSET, offsetof (struct pt_regs, cr_iip)); DEFINE(IA64_PT_REGS_CR_IFS_OFFSET, offsetof (struct pt_regs, cr_ifs)); DEFINE(IA64_PT_REGS_AR_UNAT_OFFSET, offsetof (struct pt_regs, ar_unat)); DEFINE(IA64_PT_REGS_AR_PFS_OFFSET, offsetof (struct pt_regs, ar_pfs)); DEFINE(IA64_PT_REGS_AR_RSC_OFFSET, offsetof (struct pt_regs, ar_rsc)); DEFINE(IA64_PT_REGS_AR_RNAT_OFFSET, offsetof (struct pt_regs, ar_rnat)); DEFINE(IA64_PT_REGS_AR_BSPSTORE_OFFSET, offsetof (struct pt_regs, ar_bspstore)); DEFINE(IA64_PT_REGS_PR_OFFSET, offsetof (struct pt_regs, pr)); DEFINE(IA64_PT_REGS_B0_OFFSET, offsetof (struct pt_regs, b0)); DEFINE(IA64_PT_REGS_LOADRS_OFFSET, offsetof (struct pt_regs, loadrs)); DEFINE(IA64_PT_REGS_R1_OFFSET, offsetof (struct pt_regs, r1)); DEFINE(IA64_PT_REGS_R12_OFFSET, offsetof (struct pt_regs, r12)); DEFINE(IA64_PT_REGS_R13_OFFSET, offsetof (struct pt_regs, r13)); DEFINE(IA64_PT_REGS_AR_FPSR_OFFSET, offsetof (struct pt_regs, ar_fpsr)); DEFINE(IA64_PT_REGS_R15_OFFSET, offsetof (struct pt_regs, r15)); DEFINE(IA64_PT_REGS_R14_OFFSET, offsetof (struct pt_regs, r14)); DEFINE(IA64_PT_REGS_R2_OFFSET, offsetof (struct pt_regs, r2)); DEFINE(IA64_PT_REGS_R3_OFFSET, offsetof (struct pt_regs, r3)); DEFINE(IA64_PT_REGS_R16_OFFSET, offsetof (struct pt_regs, r16)); DEFINE(IA64_PT_REGS_R17_OFFSET, offsetof (struct pt_regs, r17)); DEFINE(IA64_PT_REGS_R18_OFFSET, offsetof (struct pt_regs, r18)); DEFINE(IA64_PT_REGS_R19_OFFSET, offsetof (struct pt_regs, r19)); DEFINE(IA64_PT_REGS_R20_OFFSET, offsetof (struct pt_regs, r20)); DEFINE(IA64_PT_REGS_R21_OFFSET, offsetof (struct pt_regs, r21)); DEFINE(IA64_PT_REGS_R22_OFFSET, offsetof (struct pt_regs, r22)); DEFINE(IA64_PT_REGS_R23_OFFSET, offsetof (struct pt_regs, r23)); DEFINE(IA64_PT_REGS_R24_OFFSET, offsetof (struct pt_regs, r24)); DEFINE(IA64_PT_REGS_R25_OFFSET, offsetof (struct pt_regs, r25)); DEFINE(IA64_PT_REGS_R26_OFFSET, offsetof (struct pt_regs, r26)); DEFINE(IA64_PT_REGS_R27_OFFSET, offsetof (struct pt_regs, r27)); DEFINE(IA64_PT_REGS_R28_OFFSET, offsetof (struct pt_regs, r28)); DEFINE(IA64_PT_REGS_R29_OFFSET, offsetof (struct pt_regs, r29)); DEFINE(IA64_PT_REGS_R30_OFFSET, offsetof (struct pt_regs, r30)); DEFINE(IA64_PT_R
/* **************************************************************************

   This program creates a CRC checksum and encodes the file that is named
   in the command line.
   
   Compile with:  gcc encode_crc.c -Wall -o encode_crc

   Author:     Michael Margraf  (michael.margraf@freecom.com)
   Copyright:  Freecom Technology GmbH, Berlin, 2004
               www.freecom.com

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation; either version 2 of the License, or
  (at your option) any later version.

  This program is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with this program; if not, write to the Free Software
  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA

 ************************************************************************* */


#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/stat.h>

// *******************************************************************
// CCITT polynom G(x)=x^16+x^12+x^5+1
#define POLYNOM  0x1021

// CRC algorithm with MSB first
int make_crc16(int crc, char new)
{
  int i;
  crc = crc ^ (((int)new) << 8);
  
  for(i=0; i<8; i++) {  // work on 8 bits in "new"
    crc <<= 1;          // MSBs first
    if(crc & 0x10000)  crc ^= POLYNOM;
  }
  return crc & 0xFFFF;
}

// *******************************************************************
// Reads the file "filename" into memory and returns pointer to the buffer.
static char *readfile(char *filename, int *size)
{
	FILE		*fp;
	char		*buffer;
	struct stat	info;
	
	if (stat(filename,&info)!=0)
		return NULL;

	if ((fp=fopen(filename,"r"))==NULL)
		return NULL;

	buffer=NULL;
	for (;;)
	{
		if ((buffer=(char *)malloc(info.st_size+1))==NULL)
			break;

		if (fread(buffer,1,info.st_size,fp)!=info.st_size)
		{
			free(buffer);
			buffer=NULL;
			break;
		}

		buffer[info.st_size]='\0';
		if(size) *size = info.st_size;

		break;
	}

	(void)fclose(fp);

	return buffer;
}


// *******************************************************************
int main(int argc, char** argv)
{
  if(argc < 3) {
    printf("ERROR: Argument missing!\n\n");
    return 1;
  }

  int count;  // size of file in bytes
  char *p, *master = readfile(argv[1], &count);
  if(!master) {
    printf("ERROR: File not found!\n");
    return 1;
  }

  int crc = 0xFFFF, z;

  p = master;
  for(z=0; z<count; z++)
    crc = make_crc16(crc, *(p++));  // calculate CRC
  short crc16 = (short)crc;

	/*
  if(argc > 2) {   // with flag for device recognition ?
    p = argv[2];
    for(z=strlen(p); z>0; z--) {
      crc ^= (int)(*p);
      *(p++) = (char)crc;  // encode device flag
    }
  }
	*/

  p = master;
  for(z=0; z<count; z++) {
    crc ^= (int)(*p);
    *(p++) = (char)crc;  // encode file
  }


  // write encoded file...
  FILE *fp = fopen(argv[2], "w");
  if(!fp) {
    printf("ERROR: File not writeable!\n");
    return 1;
  }

  if(argc > 3) {  // add flag for device recognition ?
    fwrite(argv[3], strlen(argv[3]), sizeof(char), fp);
  }
  else {
    // Device is an FSG, so byte swap (IXP4xx is big endian)
    crc16 = ((crc16 >> 8) & 0xFF) | ((crc16 << 8) & 0xFF00);
  }

  fwrite(&crc16, 1, sizeof(short), fp);     // first write CRC

  fwrite(master, count, sizeof(char), fp);  // write content
  fclose(fp);

  free(master);
  return 0;
}
generated by cgit v1.2.3 (git 2.25.1) at 2026-02-17 08:07:15 +0000