#pragma once
#include "quantum.h"
#define LAYOUT( \
k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0A, k0B, k0C, k0D, k0E, k10, k11, k12, k13, \
k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2A, k2B, k2C, k2D, k2E, k30, k31, k32, \
k40, k41, k42, k43, k44, k45, k46, k66, k47, k48, k49, k4A, k4B, k4C, k4D, k4E, k50, k51, k52, k53, \
k60, k61, k62, k63, k64, k65, k68, k69, k6A, k6B, k6C, k6D, k6E, k70, k71, k72, \
k80, k81, k82, k83, k84, k85, k86, k88, k89, k8A, k8B, k8C, k8D, k8E, k90, k91, k92, k93 \
) { \
{ k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0A, k0B, k0C, k0D, k0E, k10, k11, k12, k13 }, \
{ k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2A, k2B, k2C, k2D, k2E, k30, k31, k32, KC_NO }, \
{ k40, k41, k42, k43, k44, k45, k46, k47, k48, k49, k4A, k4B, k4C, k4D, k4E, k50, k51, k52, k53 }, \
{ k60, k61, k62, k63, k64, k65, k66, KC_NO, k68, k69, k6A, k6B, k6C, k6D, k6E, k70, k71, k72, KC_NO }, \
{ k80, k81, k82, k83, k84, k85, k86, KC_NO, k88, k89, k8A, k8B, k8C, k8D, k8E, k90, k91, k92, k93 } \
}
option value='attitude_adjustment'>attitude_adjustment
upstream openwrt | James |
blob: e9e72ad11a1098527506639f6a04695561c38fdf (
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--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -513,6 +513,7 @@ void __init ralink_clk_init(void)
unsigned long sys_rate;
unsigned long dram_rate;
unsigned long periph_rate;
+ unsigned long pcmi2s_rate;
xtal_rate = mt7620_get_xtal_rate();
@@ -527,6 +528,7 @@ void __init ralink_clk_init(void)
cpu_rate = MHZ(575);
dram_rate = sys_rate = cpu_rate / 3;
periph_rate = MHZ(40);
+ pcmi2s_rate = MHZ(480);
ralink_clk_add("10000d00.uartlite", periph_rate);
ralink_clk_add("10000e00.uartlite", periph_rate);
@@ -538,6 +540,7 @@ void __init ralink_clk_init(void)
dram_rate = mt7620_get_dram_rate(pll_rate);
sys_rate = mt7620_get_sys_rate(cpu_rate);
periph_rate = mt7620_get_periph_rate(xtal_rate);
+ pcmi2s_rate = periph_rate;
pr_debug(RFMT("XTAL") RFMT("CPU_PLL") RFMT("PLL"),
RINT(xtal_rate), RFRAC(xtal_rate),
@@ -559,6 +562,8 @@ void __init ralink_clk_init(void)
ralink_clk_add("cpu", cpu_rate);
ralink_clk_add("10000100.timer", periph_rate);
ralink_clk_add("10000120.watchdog", periph_rate);
+ ralink_clk_add("10000900.i2c", periph_rate);
+ ralink_clk_add("10000a00.i2s", pcmi2s_rate);
ralink_clk_add("10000b00.spi", sys_rate);
ralink_clk_add("10000b40.spi", sys_rate);
ralink_clk_add("10000c00.uartlite", periph_rate);
--- a/arch/mips/ralink/rt288x.c
+++ b/arch/mips/ralink/rt288x.c
@@ -75,6 +75,7 @@ void __init ralink_clk_init(void)
ralink_clk_add("300100.timer", cpu_rate / 2);
ralink_clk_add("300120.watchdog", cpu_rate / 2);
ralink_clk_add("300500.uart", cpu_rate / 2);
+ ralink_clk_add("300900.i2c", cpu_rate / 2);
ralink_clk_add("300c00.uartlite", cpu_rate / 2);
ralink_clk_add("400000.ethernet", cpu_rate / 2);
ralink_clk_add("480000.wmac", wmac_rate);
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -200,6 +200,8 @@ void __init ralink_clk_init(void)
ralink_clk_add("cpu", cpu_rate);
ralink_clk_add("sys", sys_rate);
+ ralink_clk_add("10000900.i2c", uart_rate);
+ ralink_clk_add("10000a00.i2s", uart_rate);
ralink_clk_add("10000b00.spi", sys_rate);
ralink_clk_add("10000b40.spi", sys_rate);
ralink_clk_add("10000100.timer", wdt_rate);
--- a/arch/mips/ralink/rt3883.c
+++ b/arch/mips/ralink/rt3883.c
@@ -108,6 +108,8 @@ void __init ralink_clk_init(void)
ralink_clk_add("10000100.timer", sys_rate);
ralink_clk_add("10000120.watchdog", sys_rate);
ralink_clk_add("10000500.uart", 40000000);
+ ralink_clk_add("10000900.i2c", 40000000);
+ ralink_clk_add("10000a00.i2s", 40000000);
ralink_clk_add("10000b00.spi", sys_rate);
ralink_clk_add("10000b40.spi", sys_rate);
ralink_clk_add("10000c00.uartlite", 40000000);
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