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path: root/target/linux/ramips/patches-3.10/0217-pinmux-rt2880.patch
blob: 3cadce737d53e6a4088d88450bdf4b350bedfc78 (plain)
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--- a/arch/mips/ralink/rt288x.c
+++ b/arch/mips/ralink/rt288x.c
@@ -17,46 +17,27 @@
 #include <asm/mipsregs.h>
 #include <asm/mach-ralink/ralink_regs.h>
 #include <asm/mach-ralink/rt288x.h>
+#include <asm/mach-ralink/pinmux.h>
 
 #include "common.h"
 
-static struct ralink_pinmux_grp mode_mux[] = {
-	{
-		.name = "i2c",
-		.mask = RT2880_GPIO_MODE_I2C,
-		.gpio_first = 1,
-		.gpio_last = 2,
-	}, {
-		.name = "spi",
-		.mask = RT2880_GPIO_MODE_SPI,
-		.gpio_first = 3,
-		.gpio_last = 6,
-	}, {
-		.name = "uartlite",
-		.mask = RT2880_GPIO_MODE_UART0,
-		.gpio_first = 7,
-		.gpio_last = 14,
-	}, {
-		.name = "jtag",
-		.mask = RT2880_GPIO_MODE_JTAG,
-		.gpio_first = 17,
-		.gpio_last = 21,
-	}, {
-		.name = "mdio",
-		.mask = RT2880_GPIO_MODE_MDIO,
-		.gpio_first = 22,
-		.gpio_last = 23,
-	}, {
-		.name = "sdram",
-		.mask = RT2880_GPIO_MODE_SDRAM,
-		.gpio_first = 24,
-		.gpio_last = 39,
-	}, {
-		.name = "pci",
-		.mask = RT2880_GPIO_MODE_PCI,
-		.gpio_first = 40,
-		.gpio_last = 71,
-	}, {0}
+static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) };
+static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 6) };
+static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 7, 14) };
+static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 21) };
+static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 23) };
+static struct rt2880_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 39) };
+static struct rt2880_pmx_func pci_func[] = { FUNC("pci", 0, 40, 71) };
+
+static struct rt2880_pmx_group rt2880_pinmux_data_act[] = {
+    GRP("i2c", i2c_func, 1, RT2880_GPIO_MODE_I2C),
+    GRP("spi", spi_func, 1, RT2880_GPIO_MODE_SPI),
+    GRP("uartlite", uartlite_func, 1, RT2880_GPIO_MODE_UART0),
+    GRP("jtag", jtag_func, 1, RT2880_GPIO_MODE_JTAG),
+    GRP("mdio", mdio_func, 1, RT2880_GPIO_MODE_MDIO),
+    GRP("sdram", sdram_func, 1, RT2880_GPIO_MODE_SDRAM),
+    GRP("pci", pci_func, 1, RT2880_GPIO_MODE_PCI),
+    { 0 }
 };
 
 static void rt288x_wdt_reset(void)
@@ -69,11 +50,6 @@ static void rt288x_wdt_reset(void)
 	rt_sysc_w32(t, SYSC_REG_CLKCFG);
 }
 
-struct ralink_pinmux rt_gpio_pinmux = {
-	.mode = mode_mux,
-	.wdt_reset = rt288x_wdt_reset,
-};
-
 void __init ralink_clk_init(void)
 {
 	unsigned long cpu_rate;
@@ -140,4 +116,6 @@ void prom_soc_init(struct ralink_soc_inf
 	soc_info->mem_base = RT2880_SDRAM_BASE;
 	soc_info->mem_size_min = RT2880_MEM_SIZE_MIN;
 	soc_info->mem_size_max = RT2880_MEM_SIZE_MAX;
+
+        rt2880_pinmux_data = rt2880_pinmux_data_act;
 }