path: root/target/linux/qoriq/files/arch/powerpc/boot/dts/fsl/watchguard-firebox-m300.dts

// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
/*
 * WatchGuard Firebox M300 Device Tree Source
 * Based on t2081qds.dts from Linux 5.10
 *
 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
 * Copyright 2020 - 2021 Stijn Tintel <stijn@linux-ipv6.be>
 */

/include/ "t208xsi-pre.dtsi"
/include/ "t208xqds.dtsi"

/ {
	model = "WatchGuard Firebox M300";
	compatible = "watchguard,firebox-m300", "fsl,T2081QDS";

	interrupt-parent = <&mpic>;

	aliases {
		/delete-property/ ethernet0;
		/delete-property/ ethernet1;
		/delete-property/ ethernet2;
		/delete-property/ ethernet3;
		/delete-property/ ethernet4;
		/delete-property/ ethernet5;
		/delete-property/ ethernet6;
		/delete-property/ ethernet7;

		ethernet0 = &enet7;
		ethernet1 = &enet0;
		ethernet2 = &enet1;
		ethernet3 = &enet2;
		ethernet4 = &enet3;
	};
};

&soc {
// Include first to make this the first interface
/include/ "qoriq-fman3-0-10g-1.dtsi"
};

// mdio-mux under &boardctrl + its aliases removed. causes crash:
// Oops: Machine check, sig: 7 [#1]

/include/ "t2081si-post.dtsi"

// add stuff below the include to make sure we override whatever is there

&enet0 {
	phy-connection-type = "sgmii";
	phy-handle = <&phy1>;
};

&enet1 {
	phy-connection-type = "sgmii";
	phy-handle = <&phy2>;
};

&enet2 {
	phy-connection-type = "rgmii";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&enet3 {
	phy-connection-type = "rgmii";

	fixed-link {
		speed = <1000>;
		full-duplex;
	};
};

&enet4 {
	status = "disabled";
};

&enet5 {
	status = "disabled";
};

&enet6 {
	status = "disabled";
};

&enet7 {
	phy-connection-type = "sgmii";
	phy-handle = <&phy0>;
};

&ifc {
	ranges = <0x00 0x00 0x0f 0xefc00000 0x400000>;

	nor@0,0 {
		reg = <0x00 0x00 0x400000>;

		partition@0{
			reg = <0x0 0x10000>;
			label = "qoriq-rcw";
			read-only;
		};

		partition@10000 {
			reg = <0x10000 0x20000>;
			label = "wg_cfg0";
			read-only;
		};

		partition@30000 {
			reg = <0x30000 0x10000>;
			label = "wg_cfg1";
			read-only;
		};

		partition@40000 {
			reg = <0x40000 0x10000>;
			label = "wg_mfg_data";
			read-only;
		};

		partition@50000 {
			reg = <0x50000 0xb0000>;
			label = "wg_bootopt_data_and_reserved";
			read-only;
		};

		partition@100000 {
			reg = <0x100000 0xb0000>;
			label = "wg_extra_reserved_1";
			read-only;
		};

		partition@1B0000 {
			reg = <0x1b0000 0xb0000>;
			label = "wg_extra_reserved_2";
			read-only;
		};

		partition@260000 {
			reg = <0x260000 0xc0000>;
			label = "wg_u-boot_failsafe";
			read-only;
		};

		partition@320000 {
			reg = <0x320000 0x10000>;
			label = "qoriq-fman";
			read-only;
		};

		partition@330000 {
			reg = <0x330000 0x10000>;
			label = "u-boot-env";
		};

		partition@340000 {
			reg = <0x340000 0xc0000>;
			label = "u-boot";
			read-only;
		};
	};

	nand@2,0 {
		status = "disabled";
	};
};

&mdio0 {
	// m300 ethernet port 0
	phy0: ethernet-phy@0 {
		reg = <0x00>;
	};

	// m300 ethernet port 1
	phy1: ethernet-phy@1 {
		reg = <0x01>;
	};

	phy2: ethernet-phy@2 {
		reg = <0x02>;
	};

	phy3: ethernet-phy@3 {
		reg = <0x03>;
	};

	switch0: switch@10 {
		compatible = "marvell,mv88e6085";
		reg = <0x10>;

		mdio {
			#address-cells = <1>;
			#size-cells = <0>;

			switch0phy0: switch0phy0@0 {
				reg = <0x00>;
				interrupt-parent = <&switch0>;
			};

			switch0phy1: switch0phy1@1 {
				reg = <0x01>;
				interrupt-parent = <&switch0>;
			};

			switch0phy2: switch0phy2@2 {
				reg = <0x02>;
				interrupt-parent = <&switch0>;
			};

			switch0phy3: switch0phy3@3 {
				reg = <0x03>;
				interrupt-parent = <&switch0>;
			};

			switch0phy4: switch0phy4@4 {
				reg = <0x04>;
				interrupt-parent = <&switch0>;
			};
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				label = "sweth3";
				phy-handle = <&switch0phy0>;
			};

			port@1 {
				reg = <1>;
				label = "sweth4";
				phy-handle = <&switch0phy1>;
			};

			port@2 {
				reg = <2>;
				label = "sweth5";
				phy-handle = <&switch0phy2>;
			};

			port@3 {
				reg = <3>;
				label = "sweth6";
				phy-handle = <&switch0phy3>;
			};

			port@4 {
				reg = <4>;
				label = "sweth7";
				phy-handle = <&switch0phy4>;
			};

			// OEM bootlog suggests multiple ports are attached to switch
			// Keep this until OEM supplies GPL sources
			port@5 {
				status = "disabled";

				reg = "<5>";
				label = "cpu";
				ethernet = <&enet2>;
				phy-mode = "rgmii-id";

				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};

			port@6 {
				reg = <6>;
				label = "cpu";
				ethernet = <&enet3>;
				phy-mode = "rgmii-id";

				fixed-link {
					speed = <1000>;
					full-duplex;
				};
			};
		};
	};
};

&soc {
	i2c@118000 {
		tpm@29 {
			compatible = "tpm,tpm_i2c_atmel";
			reg = <0x29>;
		};
		hwmon@2c {
			compatible = "winbond,w83793";
			reg = <0x2c>;
		};
		hwmon@2d {
			compatible = "winbond,w83793";
			reg = <0x2d>;
		};
		rtc@32 {
			compatible = "ricoh,rs5c372a";
			reg = <0x32>;
		};
		pca9547@77 {
			status = "disabled";
		};
	};

	spi@110000 {
		// DTS decompiled from OEM DTB contains flash@0 but doesn't work
		// spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff
		// disable for now
		flash@0 {
			status = "disabled";
		};

		flash@1 {
			status = "disabled";
		};

		flash@2 {
			status = "disabled";
		};
	};
};