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From 5f0a1fa77e5d53b8dbb751fcfc59c7ef3d78ddf2 Mon Sep 17 00:00:00 2001
From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Date: Wed, 2 Mar 2016 12:00:11 -0500
Subject: [PATCH 57/81] mtd: mediatek: device tree docs for MTK Smart Device
Gen1 NAND
This patch adds documentation support for Smart Device Gen1 type of
NAND controllers.
Mediatek's SoC 2701 is one of the SoCs that implements this controller.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
---
.../devicetree/bindings/mtd/mtksdg1-nand.txt | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtksdg1-nand.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtksdg1-nand.txt
@@ -0,0 +1,38 @@
+MTK Smart Device SoCs NAND controller DT binding
+
+Required properties:
+- compatible: Should be "mediatek,mt2701-nfc".
+- reg: The first contains base physical address and size of
+ NAND controller's registers. The second contains base
+ physical address and size of NAND ECC engine.
+- interrupts: the NFC NFI interrupt, and the NFC ECC interrupt
+- clocks: NAND controller clocks.
+- clock-names: NAND controller clocks internal name.
+- vmch-supply: NAND power supply.
+- #address-cells: Partition address, should be set 1.
+- #size-cells: Partition size, should be set 1.
+
+Optional properties:
+
+nand-on-flash-bbt: Use a flash based bad block table.
+
+Optional subnodes:
+- Partitions, see Documentation/devicetree/bindings/mtd/partition.txt
+
+Example:
+
+ nand: nand@1100d000 {
+ compatible = "mediatek,mt2701-nfc";
+ reg = <0 0x1100d000 0 0x1000>, <0 0x1100e000 0 0x1000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&pericfg CLK_PERI_NFI>, <&pericfg CLK_PERI_NFI_ECC>,
+ <&pericfg CLK_PERI_NFI_PAD>;
+ clock-names = "nfi_ck", "nfi_ecc_ck", "nfi_pad_ck";
+ vmch-supply = <&mt6323_vmch_reg>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ ...
+ };
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