blob: 235daca71c863e6e6618271cd2802b6338ca9fa7 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
|
From f5db8274c8d6c86812fd2036ae49153d3ade3eaa Mon Sep 17 00:00:00 2001
From: richard zhu <hongxing.zhu@nxp.com>
Date: Wed, 6 Nov 2019 15:11:36 +0800
Subject: [PATCH] PCI: dwc: fix the msi failure after pm operations
The controller may be powered off (Link is in L3) during the suspend
mode. The MSI_ADDR would be missed after resume and MSI function
would be failed.
Re-store MSI_ADDR to fix the MSI failure after PM operations.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Acked-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
drivers/pci/controller/dwc/pcie-designware-host.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -654,6 +654,12 @@ void dw_pcie_setup_rc(struct pcie_port *
dw_pcie_setup(pci);
if (!pp->ops->msi_host_init) {
+ /* Program the msi_data */
+ dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4,
+ lower_32_bits((u64)pp->msi_data));
+ dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4,
+ upper_32_bits((u64)pp->msi_data));
+
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
/* Initialize IRQ Status array */
|