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From 4de7a5e35eff9216fa5e6b138b0ffa75e045e397 Mon Sep 17 00:00:00 2001
From: Xiaowei Bao <xiaowei.bao@nxp.com>
Date: Thu, 28 Feb 2019 14:09:01 +0800
Subject: [PATCH] arm64: dts: freescale: lx2160a: add pcie EP mode DT nodes
The LX2160A PCIe EP mode node.
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 56 ++++++++++++++++++++++++++
1 file changed, 56 insertions(+)
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -932,6 +932,15 @@
status = "disabled";
};
+ pcie_ep@3400000 {
+ compatible = "fsl,lx2160a-pcie-ep";
+ reg = <0x00 0x03400000 0x0 0x00100000
+ 0x80 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ob-windows = <256>;
+ status = "disabled";
+ };
+
pcie@3500000 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
@@ -959,6 +968,15 @@
status = "disabled";
};
+ pcie_ep@3500000 {
+ compatible = "fsl,lx2160a-pcie-ep";
+ reg = <0x00 0x03500000 0x0 0x00100000
+ 0x88 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ob-windows = <256>;
+ status = "disabled";
+ };
+
pcie@3600000 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
@@ -986,6 +1004,16 @@
status = "disabled";
};
+ pcie_ep@3600000 {
+ compatible = "fsl,lx2160a-pcie-ep";
+ reg = <0x00 0x03600000 0x0 0x00100000
+ 0x90 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ob-windows = <256>;
+ max-functions = <2>;
+ status = "disabled";
+ };
+
pcie@3700000 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
@@ -1013,6 +1041,15 @@
status = "disabled";
};
+ pcie_ep@3700000 {
+ compatible = "fsl,lx2160a-pcie-ep";
+ reg = <0x00 0x03700000 0x0 0x00100000
+ 0x98 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ob-windows = <256>;
+ status = "disabled";
+ };
+
pcie@3800000 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */
@@ -1040,6 +1077,16 @@
status = "disabled";
};
+ pcie_ep@3800000 {
+ compatible = "fsl,lx2160a-pcie-ep";
+ reg = <0x00 0x03800000 0x0 0x00100000
+ 0xa0 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ob-windows = <256>;
+ max-functions = <2>;
+ status = "disabled";
+ };
+
pcie@3900000 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */
@@ -1067,6 +1114,15 @@
status = "disabled";
};
+ pcie_ep@3900000 {
+ compatible = "fsl,lx2160a-pcie-ep";
+ reg = <0x00 0x03900000 0x0 0x00100000
+ 0xa8 0x00000000 0x8 0x00000000>;
+ reg-names = "regs", "addr_space";
+ num-ob-windows = <256>;
+ status = "disabled";
+ };
+
smmu: iommu@5000000 {
compatible = "arm,mmu-500";
reg = <0 0x5000000 0 0x800000>;
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