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From b1e679aba75e5e137c70bc76169c34835ef0e474 Mon Sep 17 00:00:00 2001
From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Date: Tue, 24 Jul 2018 13:11:03 +0300
Subject: [PATCH] arm64: dts: ls104x: make dma-coherent global to the SoC
These SoCs are really completely dma coherent in their entirety so add
the dma-coherent property at the soc level in the device tree and drop
the instances where it's specifically added to a few select devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 5 +----
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
2 files changed, 2 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -219,6 +219,7 @@
#size-cells = <2>;
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+ dma-coherent;
clockgen: clocking@1ee1000 {
compatible = "fsl,ls1043a-clockgen";
@@ -772,7 +773,6 @@
reg-names = "ahci", "sata-ecc";
interrupts = <0 69 0x4>;
clocks = <&clockgen 4 0>;
- dma-coherent;
};
msi1: msi-controller1@1571000 {
@@ -807,7 +807,6 @@
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
@@ -834,7 +833,6 @@
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
@@ -861,7 +859,6 @@
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- dma-coherent;
iommu-map = <0 &smmu 0 1>; /* update by bootloader */
num-viewport = <6>;
bus-range = <0x0 0xff>;
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -191,6 +191,7 @@
#size-cells = <2>;
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+ dma-coherent;
ddr: memory-controller@1080000 {
compatible = "fsl,qoriq-memory-controller";
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