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From 18363f691e931abf0e9bdc9b5169fb15aa10224d Mon Sep 17 00:00:00 2001
From: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Date: Sun, 15 May 2022 03:24:22 +0530
Subject: [PATCH] arm64: dts: qcom: Fix ordering of 'clocks' & 'clock-names'
for sdhci nodes
Since the Qualcomm sdhci-msm device-tree binding has been converted
to yaml format, 'make dtbs_check' reports a number of issues with
ordering of 'clocks' & 'clock-names' for sdhci nodes:
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
clock-names:0: 'iface' was expected
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
clock-names:1: 'core' was expected
arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900:
clock-names:2: 'xo' was expected
Fix the same by updating the offending 'dts' files.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -384,10 +384,10 @@
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&xo>,
- <&gcc GCC_SDCC1_AHB_CLK>,
- <&gcc GCC_SDCC1_APPS_CLK>;
- clock-names = "xo", "iface", "core";
+ clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+ <&gcc GCC_SDCC1_APPS_CLK>,
+ <&xo>;
+ clock-names = "iface", "core", "xo";
max-frequency = <384000000>;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
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