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path: root/target/linux/ipq806x/patches-4.14/0071-2-PCI-qcom-Fixed-IPQ806x-PCIE-reset-changes.patch
blob: a2ae1e064b8246b0f655c99a4c9dd0ef1dfb6b06 (plain)
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From 490d103232287eb51c92c49a4ef8865fd0a9d59e Mon Sep 17 00:00:00 2001
From: Sham Muthayyan <smuthayy@codeaurora.org>
Date: Tue, 19 Jul 2016 18:58:18 +0530
Subject: PCI: qcom: Fixed IPQ806x PCIE reset changes

Change-Id: Ia6590e960b9754b1e8b7a51f318788cd63e9e321
Signed-off-by: Sham Muthayyan <smuthayy@codeaurora.org>
---
 drivers/pci/host/pcie-qcom.c | 24 +++++++++++++++++++-----
 1 file changed, 19 insertions(+), 5 deletions(-)

--- a/drivers/pci/dwc/pcie-qcom.c
+++ b/drivers/pci/dwc/pcie-qcom.c
@@ -98,6 +98,7 @@
 	struct reset_control *ahb_reset;
 	struct reset_control *por_reset;
 	struct reset_control *phy_reset;
+	struct reset_control *ext_reset;
 	struct regulator *vdda;
 	struct regulator *vdda_phy;
 	struct regulator *vdda_refclk;
@@ -275,6 +276,10 @@
 	if (IS_ERR(res->por_reset))
 		return PTR_ERR(res->por_reset);

+	res->ext_reset = devm_reset_control_get(dev, "ext");
+	if (IS_ERR(res->ext_reset))
+		return PTR_ERR(res->ext_reset);
+
 	res->phy_reset = devm_reset_control_get_exclusive(dev, "phy");
 	return PTR_ERR_OR_ZERO(res->phy_reset);
 }
@@ -288,6 +293,7 @@
 	reset_control_assert(res->ahb_reset);
 	reset_control_assert(res->por_reset);
 	reset_control_assert(res->pci_reset);
+	reset_control_assert(res->ext_reset);
 	clk_disable_unprepare(res->iface_clk);
 	clk_disable_unprepare(res->core_clk);
 	clk_disable_unprepare(res->phy_clk);
@@ -306,6 +312,12 @@
 	u32 val;
 	int ret;

+	ret = reset_control_assert(res->ahb_reset);
+	if (ret) {
+		dev_err(dev, "cannot assert ahb reset\n");
+		return ret;
+	}
+
 	ret = regulator_enable(res->vdda);
 	if (ret) {
 		dev_err(dev, "cannot enable vdda regulator\n");
@@ -324,16 +336,16 @@
 		goto err_vdda_phy;
 	}

-	ret = reset_control_assert(res->ahb_reset);
+	ret = reset_control_deassert(res->ext_reset);
 	if (ret) {
-		dev_err(dev, "cannot assert ahb reset\n");
-		goto err_assert_ahb;
+		dev_err(dev, "cannot assert ext reset\n");
+		goto err_reset_ext;
 	}

 	ret = clk_prepare_enable(res->iface_clk);
 	if (ret) {
 		dev_err(dev, "cannot prepare/enable iface clock\n");
-		goto err_assert_ahb;
+		goto err_iface;
 	}

 	ret = clk_prepare_enable(res->core_clk);
@@ -422,7 +434,9 @@
 	clk_disable_unprepare(res->core_clk);
 err_clk_core:
 	clk_disable_unprepare(res->iface_clk);
-err_assert_ahb:
+err_iface:
+	reset_control_assert(res->ext_reset);
+err_reset_ext:
 	regulator_disable(res->vdda_phy);
 err_vdda_phy:
 	regulator_disable(res->vdda_refclk);