1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
|
--- /dev/null
+++ b/arch/arm/mach-cns21xx/dev-spi-master.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, Version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/spi/spi.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+
+#include <mach/hardware.h>
+#include <mach/cns21xx.h>
+#include <mach/cns21xx_misc.h>
+#include <mach/cns21xx_powermgmt.h>
+#include <mach/irqs.h>
+
+#include "common.h"
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+static struct resource cns21xx_spi_resources[] = {
+ [0] = {
+ .start = CNS21XX_SPI_BASE,
+ .end = CNS21XX_SPI_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = CNS21XX_IRQ_SPI,
+ .end = CNS21XX_IRQ_SPI,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device cns21xx_spi_master_device = {
+ .name = "cns21xx-spi",
+ .id = -1,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ },
+ .resource = cns21xx_spi_resources,
+ .num_resources = ARRAY_SIZE(cns21xx_spi_resources),
+};
+
+void __init cns21xx_register_spi_master(int id, struct spi_board_info *info,
+ unsigned int n)
+{
+ unsigned int i;
+
+ /* Enable SPI pins */
+ HAL_MISC_ENABLE_SPIDR_PINS();
+ HAL_MISC_ENABLE_SPICLK_PINS();
+ for (i = 0; i < n; i++) {
+ switch (info[i].chip_select) {
+ case 0:
+ HAL_MISC_ENABLE_SPICSN0_PINS();
+ break;
+ case 1:
+ HAL_MISC_ENABLE_SPICSN1_PINS();
+ break;
+ case 2:
+ HAL_MISC_ENABLE_SPICSN2_PINS();
+ break;
+ case 3:
+ HAL_MISC_ENABLE_SPICSN3_PINS();
+ break;
+ }
+ }
+
+ /* Disable SPI serial flash access through 0x30000000 region */
+ HAL_MISC_DISABLE_SPI_SERIAL_FLASH_BANK_ACCESS();
+
+ /* Enable SPI clock */
+ HAL_PWRMGT_ENABLE_SPI_CLOCK();
+
+ cns21xx_spi_master_device.id = id;
+
+ spi_register_board_info(info, n);
+ platform_device_register(&cns21xx_spi_master_device);
+}
--- a/arch/arm/mach-cns21xx/Kconfig
+++ b/arch/arm/mach-cns21xx/Kconfig
@@ -6,4 +6,7 @@ endmenu
config CNS21XX_DEV_USB
def_bool n
+config CNS21XX_DEV_SPI_MASTER
+ def_bool n
+
endif
--- a/arch/arm/mach-cns21xx/Makefile
+++ b/arch/arm/mach-cns21xx/Makefile
@@ -8,6 +8,7 @@ obj-y := core.o devices.o gpio.o irq.o
# devices
obj-$(CONFIG_CNS21XX_DEV_USB) += dev-usb.o
+obj-$(CONFIG_CNS21XX_DEV_SPI_MASTER) += dev-spi-master.o
# machine specific files
--- a/arch/arm/mach-cns21xx/common.h
+++ b/arch/arm/mach-cns21xx/common.h
@@ -21,4 +21,8 @@ int __init cns21xx_register_uart1(void);
int __init cns21xx_register_usb(void);
int __init cns21xx_register_wdt(void);
+struct spi_board_info;
+void __init cns21xx_register_spi_master(int id, struct spi_board_info *info,
+ unsigned int n);
+
#endif /* _MACH_CNS21XX_COMMON_H */
|
