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/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "brcm,bcm6318";
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
spi1 = &hsspi;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "brcm,bmips3300", "mips,mips4Kc";
device_type = "cpu";
reg = <0>;
};
};
cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
interrupt-controller;
#interrupt-cells = <1>;
};
memory { device_type = "memory"; reg = <0 0>; };
ubus@10000000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
compatible = "simple-bus";
interrupt-parent = <&periph_intc>;
ext_intc: interrupt-controller@10000018 {
compatible = "brcm,bcm6318-ext-intc";
reg = <0x10000018 0x4>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <24>, <25>, <26>, <27>;
};
periph_intc: interrupt-controller@10000020 {
compatible = "brcm,bcm6345-l1-intc";
reg = <0x10000020 0x20>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpu_intc>;
interrupts = <2>;
};
gpio1: gpio-controller@10000080 {
compatible = "brcm,bcm6345-gpio";
reg = <0x10000080 4>, <0x10000088 4>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <18>;
interrupt-parent = <&ext_intc>;
interrupts = <0 0>, <1 0>;
interrupt-names = "gpio1", "gpio2";
};
gpio0: gpio-controller@10000084 {
compatible = "brcm,bcm6345-gpio";
reg = <0x10000084 4>, <0x1000008c 4>;
gpio-controller;
#gpio-cells = <2>;
};
hsspi: spi@10003000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10003000 0x600>;
interrupts = <29>;
/* clocks = <&clkctl 25>; */
};
};
};
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