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From 1d061a2bcabc8fb49de7db0094da863f8e7966e2 Mon Sep 17 00:00:00 2001
From: Alan Yiding Wang <y2366wan@uwaterloo.ca>
Date: Sat, 3 Dec 2016 23:22:02 -0500
Subject: [PATCH] BCM270X_DT: Add overlay for enc28j60 on SPI2
Works on SPI2 for compute module
---
arch/arm/boot/dts/overlays/Makefile | 1 +
arch/arm/boot/dts/overlays/README | 10 ++++-
.../boot/dts/overlays/enc28j60-spi2-overlay.dts | 47 ++++++++++++++++++++++
3 files changed, 57 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
--- a/arch/arm/boot/dts/overlays/Makefile
+++ b/arch/arm/boot/dts/overlays/Makefile
@@ -28,6 +28,7 @@ dtbo-$(RPI_DT_OVERLAYS) += dpi24.dtbo
dtbo-$(RPI_DT_OVERLAYS) += dwc-otg.dtbo
dtbo-$(RPI_DT_OVERLAYS) += dwc2.dtbo
dtbo-$(RPI_DT_OVERLAYS) += enc28j60.dtbo
+dtbo-$(RPI_DT_OVERLAYS) += enc28j60-spi2.dtbo
dtbo-$(RPI_DT_OVERLAYS) += gpio-ir.dtbo
dtbo-$(RPI_DT_OVERLAYS) += gpio-poweroff.dtbo
dtbo-$(RPI_DT_OVERLAYS) += hifiberry-amp.dtbo
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -344,12 +344,20 @@ Params: dr_mode Dual rol
Name: enc28j60
-Info: Overlay for the Microchip ENC28J60 Ethernet Controller (SPI)
+Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI0
Load: dtoverlay=enc28j60,<param>=<val>
Params: int_pin GPIO used for INT (default 25)
speed SPI bus speed (default 12000000)
+
+Name: enc28j60-spi2
+Info: Overlay for the Microchip ENC28J60 Ethernet Controller on SPI2
+Load: dtoverlay=enc28j60-spi2,<param>=<val>
+Params: int_pin GPIO used for INT (default 39)
+
+ speed SPI bus speed (default 12000000)
+
Name: gpio-ir
Info: Use GPIO pin as rc-core style infrared receiver input. The rc-core-
--- /dev/null
+++ b/arch/arm/boot/dts/overlays/enc28j60-spi2-overlay.dts
@@ -0,0 +1,47 @@
+// Overlay for the Microchip ENC28J60 Ethernet Controller - SPI2 Compute Module
+// Interrupt pin: 39
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "brcm,bcm2708";
+
+ fragment@0 {
+ target = <&spi2>;
+ __overlay__ {
+ /* needed to avoid dtc warning */
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "okay";
+
+ eth1: enc28j60@0{
+ compatible = "microchip,enc28j60";
+ reg = <0>; /* CE0 */
+ pinctrl-names = "default";
+ pinctrl-0 = <ð1_pins>;
+ interrupt-parent = <&gpio>;
+ interrupts = <39 0x2>; /* falling edge */
+ spi-max-frequency = <12000000>;
+ status = "okay";
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&gpio>;
+ __overlay__ {
+ eth1_pins: eth1_pins {
+ brcm,pins = <39>;
+ brcm,function = <0>; /* in */
+ brcm,pull = <0>; /* none */
+ };
+ };
+ };
+
+ __overrides__ {
+ int_pin = <ð1>, "interrupts:0",
+ <ð1_pins>, "brcm,pins:0";
+ speed = <ð1>, "spi-max-frequency:0";
+ };
+};
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