blob: c88225c5f7239d6cf3f025ed73faf59d6bfd07d6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
/*
* AR71xx SoC routines
*
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <asm/mach-ar71xx/ar71xx.h>
void __iomem *ar71xx_ddr_base;
void __iomem *ar71xx_pll_base;
void __iomem *ar71xx_reset_base;
void __iomem *ar71xx_gpio_base;
void __iomem *ar71xx_usb_ctrl_base;
void ar71xx_device_stop(u32 mask)
{
unsigned long flags;
local_irq_save(flags);
ar71xx_reset_wr(RESET_REG_RESET_MODULE,
ar71xx_reset_rr(RESET_REG_RESET_MODULE) | mask);
local_irq_restore(flags);
}
EXPORT_SYMBOL_GPL(ar71xx_device_stop);
void ar71xx_device_start(u32 mask)
{
unsigned long flags;
local_irq_save(flags);
ar71xx_reset_wr(RESET_REG_RESET_MODULE,
ar71xx_reset_rr(RESET_REG_RESET_MODULE) & ~mask);
local_irq_restore(flags);
}
EXPORT_SYMBOL_GPL(ar71xx_device_start);
void ar71xx_ddr_flush(u32 reg)
{
ar71xx_ddr_wr(reg, 1);
while ((ar71xx_ddr_rr(reg) & 0x1));
ar71xx_ddr_wr(reg, 1);
while ((ar71xx_ddr_rr(reg) & 0x1));
}
EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
|