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path: root/rules.mk
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include $(TOPDIR)/.config
SHELL=/bin/bash
export SHELL

ifeq ($(V),)
V=5
endif


ifneq ($(V),0)
TRACE:=echo "---> "
START_TRACE:=echo -n "---> "
END_TRACE:=echo
else
START_TRACE:=:
END_TRACE:=:
TRACE:=:
endif

ifeq (${shell [ "$(V)" -ge 5 ] && echo 1},)
CMD_TRACE:=:
PKG_TRACE:=:
else
CMD_TRACE:=echo -n
PKG_TRACE:=echo "------> "
endif

ifeq (${shell [ "$(V)" -ge 10 ] && echo 1},)
EXTRA_MAKEFLAGS:=-s
MAKE_TRACE:=2>&1 >&/dev/null || { echo "Build failed. Please re-run make with V=99 to see what's going on"; /bin/false; }
else
MAKE_TRACE:=
EXTRA_MAKEFLAGS:=
TRACE:=:
PKG_TRACE:=:
CMD_TRACE:=:
START_TRACE:=:
END_TRACE:=:
endif

MAKE1=make
MAKEFLAGS=-j$(BR2_JLEVEL) V=$(V) $(EXTRA_MAKEFLAGS)
# Strip off the annoying quoting
ARCH:=$(strip $(subst ",, $(BR2_ARCH)))
WGET:=$(strip $(subst ",, $(BR2_WGET)))
GCC_VERSION:=$(strip $(subst ",, $(BR2_GCC_VERSION)))
GCC_USE_SJLJ_EXCEPTIONS:=$(strip $(subst ",, $(BR2_GCC_USE_SJLJ_EXCEPTIONS)))
TARGET_OPTIMIZATION:=$(strip $(subst ",, $(BR2_TARGET_OPTIMIZATION)))
#"))"))"))"))")) # for vim's broken syntax highlighting :)


ifeq ($(BR2_SOFT_FLOAT),y)
# gcc 3.4.x soft float configuration is different than previous versions.
ifeq ($(findstring 3.4.,$(GCC_VERSION)),3.4.)
SOFT_FLOAT_CONFIG_OPTION:=--with-float=soft
else
SOFT_FLOAT_CONFIG_OPTION:=--without-float
endif
TARGET_SOFT_FLOAT:=-msoft-float
ARCH_FPU_SUFFIX:=_nofpu
else
SOFT_FLOAT_CONFIG_OPTION:=
TARGET_SOFT_FLOAT:=
ARCH_FPU_SUFFIX:=
endif


ifeq ($(BR2_TAR_VERBOSITY),y)
TAR_OPTIONS=-xvf
else
TAR_OPTIONS=-xf
endif

ifneq ($(BR2_LARGEFILE),y)
DISABLE_LARGEFILE= --disable-largefile
endif
TARGET_CFLAGS:=$(TARGET_OPTIMIZATION) $(TARGET_DEBUGGING)

OPTIMIZE_FOR_CPU=$(ARCH)
HOSTCC:=gcc
BASE_DIR:=$(TOPDIR)
DL_DIR:=$(BASE_DIR)/dl
BUILD_DIR:=$(BASE_DIR)/build_$(ARCH)$(ARCH_FPU_SUFFIX)
STAGING_DIR:=$(BASE_DIR)/staging_dir_$(ARCH)$(ARCH_FPU_SUFFIX)
SCRIPT_DIR:=$(BASE_DIR)/scripts
BIN_DIR:=$(BASE_DIR)/bin
STAMP_DIR:=$(BUILD_DIR)/stamp
PACKAGE_DIR:=$(BIN_DIR)/packages
STAMP_DIR:=$(BUILD_DIR)/stamp
TARGET_DIR:=$(BUILD_DIR)/root
TOOL_BUILD_DIR=$(BASE_DIR)/toolchain_build_$(ARCH)$(ARCH_FPU_SUFFIX)
TARGET_PATH=$(STAGING_DIR)/usr/bin:$(STAGING_DIR)/bin:/bin:/sbin:/usr/bin:/usr/sbin
IMAGE:=$(BUILD_DIR)/root_fs_$(ARCH)$(ARCH_FPU_SUFFIX)
REAL_GNU_TARGET_NAME=$(OPTIMIZE_FOR_CPU)-linux-uclibc
GNU_TARGET_NAME=$(OPTIMIZE_FOR_CPU)-linux
KERNEL_CROSS:=$(STAGING_DIR)/bin/$(OPTIMIZE_FOR_CPU)-linux-uclibc-
TARGET_CROSS:=$(STAGING_DIR)/bin/$(OPTIMIZE_FOR_CPU)-linux-uclibc-
TARGET_CC:=$(TARGET_CROSS)gcc
STRIP:=$(STAGING_DIR)/bin/sstrip
PATCH=$(SCRIPT_DIR)/patch-kernel.sh
SED:=$(STAGING_DIR)/bin/sed -i -e
LINUX_DIR:=$(BUILD_DIR)/linux
LINUX_HEADERS_DIR:=$(TOOL_BUILD_DIR)/linux


HOST_ARCH:=$(shell $(HOSTCC) -dumpmachine | sed -e s'/-.*//' \
	-e 's/sparc.*/sparc/' \
	-e 's/arm.*/arm/g' \
	-e 's/m68k.*/m68k/' \
	-e 's/ppc/powerpc/g' \
	-e 's/v850.*/v850/g' \
	-e 's/sh[234]/sh/' \
	-e 's/mips-.*/mips/' \
	-e 's/mipsel-.*/mipsel/' \
	-e 's/cris.*/cris/' \
	-e 's/i[3-9]86/i386/' \
	)
GNU_HOST_NAME:=$(HOST_ARCH)-pc-linux-gnu
TARGET_CONFIGURE_OPTS=PATH=$(TARGET_PATH) \
		AR=$(TARGET_CROSS)ar \
		AS=$(TARGET_CROSS)as \
		LD=$(TARGET_CROSS)ld \
		NM=$(TARGET_CROSS)nm \
		CC=$(TARGET_CROSS)gcc \
		GCC=$(TARGET_CROSS)gcc \
		CXX=$(TARGET_CROSS)g++ \
		RANLIB=$(TARGET_CROSS)ranlib

ifeq ($(ENABLE_LOCALE),true)
DISABLE_NLS:=
else
DISABLE_NLS:=--disable-nls
endif

ifeq ($(BR2_ENABLE_MULTILIB),y)
MULTILIB:=--enable-multilib
endif

# invoke ipkg-build with some default options
IPKG_BUILD := PATH="$(TARGET_PATH)" ipkg-build -c -o root -g root
# where to build (and put) .ipk packages
IPKG_TARGET_DIR := $(PACKAGE_DIR)
IPKG:=IPKG_TMP=$(BUILD_DIR)/tmp IPKG_INSTROOT=$(TARGET_DIR) IPKG_CONF_DIR=$(STAGING_DIR)/etc IPKG_OFFLINE_ROOT=$(BUILD_DIR)/root $(SCRIPT_DIR)/ipkg -force-defaults -force-depends
IPKG_STATE_DIR := $(TARGET_DIR)/usr/lib/ipkg

RSTRIP:=STRIP="$(STRIP)" $(SCRIPT_DIR)/rstrip.sh
RSTRIP_KMOD:=STRIP="$(TARGET_CROSS)strip --strip-unneeded --remove-section=.comment" $(SCRIPT_DIR)/rstrip.sh
(p->port + reg) +#define port_w32(p, val, reg) ltq_w32(val, p->port + reg) +#define port_w32_mask(p, clear, set, reg) \ + port_w32(p, (port_r32(p, reg) & ~(clear)) | (set), reg) + +#define MAX_PORTS 5 +#define PINS_PER_PORT 32 + +struct falcon_gpio_port { + struct gpio_chip gpio_chip; + void __iomem *port; + unsigned int irq_base; + unsigned int chained_irq; + struct clk *clk; + char name[6]; +}; + +static int falcon_gpio_direction_input(struct gpio_chip *chip, + unsigned int offset) +{ + port_w32(ctop(chip), 1 << offset, GPIO_DIRCLR); + + return 0; +} + +static void falcon_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + if (value) + port_w32(ctop(chip), 1 << offset, GPIO_OUTSET); + else + port_w32(ctop(chip), 1 << offset, GPIO_OUTCLR); +} + +static int falcon_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + falcon_gpio_set(chip, offset, value); + port_w32(ctop(chip), 1 << offset, GPIO_DIRSET); + + return 0; +} + +static int falcon_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + if ((port_r32(ctop(chip), GPIO_DIR) >> offset) & 1) + return (port_r32(ctop(chip), GPIO_OUT) >> offset) & 1; + else + return (port_r32(ctop(chip), GPIO_IN) >> offset) & 1; +} + +static int falcon_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + int gpio = chip->base + offset; + + return pinctrl_request_gpio(gpio); +} + +static void falcon_gpio_free(struct gpio_chip *chip, unsigned offset) +{ + int gpio = chip->base + offset; + + pinctrl_free_gpio(gpio); +} + +static int falcon_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + return ctop(chip)->irq_base + offset; +} + +static void falcon_gpio_disable_irq(struct irq_data *d) +{ + unsigned int offset = d->irq - itop(d)->irq_base; + + port_w32(itop(d), 1 << offset, GPIO_IRNENCLR); +} + +static void falcon_gpio_enable_irq(struct irq_data *d) +{ + unsigned int offset = d->irq - itop(d)->irq_base; + + port_w32(itop(d), 1 << offset, GPIO_IRNRNSET); +} + +static void falcon_gpio_ack_irq(struct irq_data *d) +{ + unsigned int offset = d->irq - itop(d)->irq_base; + + port_w32(itop(d), 1 << offset, GPIO_IRNCR); +} + +static void falcon_gpio_mask_and_ack_irq(struct irq_data *d) +{ + unsigned int offset = d->irq - itop(d)->irq_base; + + port_w32(itop(d), 1 << offset, GPIO_IRNENCLR); + port_w32(itop(d), 1 << offset, GPIO_IRNCR); +} + +static struct irq_chip falcon_gpio_irq_chip; +static int falcon_gpio_irq_type(struct irq_data *d, unsigned int type) +{ + unsigned int offset = d->irq - itop(d)->irq_base; + unsigned int mask = 1 << offset; + + if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_NONE) + return 0; + + if ((type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) != 0) { + /* level triggered */ + port_w32_mask(itop(d), 0, mask, GPIO_IRNCFG); + irq_set_chip_and_handler_name(d->irq, + &falcon_gpio_irq_chip, handle_level_irq, "mux"); + } else { + /* edge triggered */ + port_w32_mask(itop(d), mask, 0, GPIO_IRNCFG); + irq_set_chip_and_handler_name(d->irq, + &falcon_gpio_irq_chip, handle_simple_irq, "mux"); + } + + if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { + port_w32_mask(itop(d), mask, 0, GPIO_EXINTCR0); + port_w32_mask(itop(d), 0, mask, GPIO_EXINTCR1); + } else { + if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)) != 0) + /* positive logic: rising edge, high level */ + port_w32_mask(itop(d), mask, 0, GPIO_EXINTCR0); + else + /* negative logic: falling edge, low level */ + port_w32_mask(itop(d), 0, mask, GPIO_EXINTCR0); + port_w32_mask(itop(d), mask, 0, GPIO_EXINTCR1); + } + + return gpio_direction_input(itop(d)->gpio_chip.base + offset); +} + +static void falcon_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + struct falcon_gpio_port *gpio_port = irq_desc_get_handler_data(desc); + unsigned long irncr; + int offset; + + /* acknowledge interrupt */ + irncr = port_r32(gpio_port, GPIO_IRNCR); + port_w32(gpio_port, irncr, GPIO_IRNCR); + + desc->irq_data.chip->irq_ack(&desc->irq_data); + + for_each_set_bit(offset, &irncr, gpio_port->gpio_chip.ngpio) + generic_handle_irq(gpio_port->irq_base + offset); +} + +static int falcon_gpio_irq_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hw) +{ + struct falcon_gpio_port *port = d->host_data; + + irq_set_chip_and_handler_name(irq, &falcon_gpio_irq_chip, + handle_simple_irq, "mux"); + irq_set_chip_data(irq, port); + + /* set to negative logic (falling edge, low level) */ + port_w32_mask(port, 0, 1 << hw, GPIO_EXINTCR0); + return 0; +} + +static struct irq_chip falcon_gpio_irq_chip = { + .name = "gpio_irq_mux", + .irq_mask = falcon_gpio_disable_irq, + .irq_unmask = falcon_gpio_enable_irq, + .irq_ack = falcon_gpio_ack_irq, + .irq_mask_ack = falcon_gpio_mask_and_ack_irq, + .irq_set_type = falcon_gpio_irq_type, +}; + +static const struct irq_domain_ops irq_domain_ops = { + .xlate = irq_domain_xlate_onetwocell, + .map = falcon_gpio_irq_map, +}; + +static struct irqaction gpio_cascade = { + .handler = no_action, + .flags = IRQF_DISABLED, + .name = "gpio_cascade", +}; + +static int falcon_gpio_probe(struct platform_device *pdev) +{ + struct pinctrl_gpio_range *gpio_range; + struct device_node *node = pdev->dev.of_node; + const __be32 *bank = of_get_property(node, "lantiq,bank", NULL); + struct falcon_gpio_port *gpio_port; + struct resource *gpiores, irqres; + int ret, size; + + if (!bank || *bank >= MAX_PORTS) + return -ENODEV; + + size = pinctrl_falcon_get_range_size(*bank); + if (size < 1) { + dev_err(&pdev->dev, "pad not loaded for bank %d\n", *bank); + return size; + } + + gpiores = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!gpiores) + return -ENODEV; + + gpio_range = devm_kzalloc(&pdev->dev, sizeof(struct pinctrl_gpio_range), + GFP_KERNEL); + if (!gpio_range) + return -ENOMEM; + + gpio_port = devm_kzalloc(&pdev->dev, sizeof(struct falcon_gpio_port), + GFP_KERNEL); + if (!gpio_port) + return -ENOMEM; + snprintf(gpio_port->name, 6, "gpio%d", *bank); + gpio_port->gpio_chip.label = gpio_port->name; + gpio_port->gpio_chip.direction_input = falcon_gpio_direction_input; + gpio_port->gpio_chip.direction_output = falcon_gpio_direction_output; + gpio_port->gpio_chip.get = falcon_gpio_get; + gpio_port->gpio_chip.set = falcon_gpio_set; + gpio_port->gpio_chip.request = falcon_gpio_request; + gpio_port->gpio_chip.free = falcon_gpio_free; + gpio_port->gpio_chip.base = -1; + gpio_port->gpio_chip.ngpio = size; + gpio_port->gpio_chip.dev = &pdev->dev; + + gpio_port->port = devm_request_and_ioremap(&pdev->dev, gpiores); + if (!gpio_port->port) { + dev_err(&pdev->dev, "Could not map io ranges\n"); + return -ENOMEM; + } + + gpio_port->clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(gpio_port->clk)) { + dev_err(&pdev->dev, "Could not get clock\n"); + return PTR_ERR(gpio_port->clk); + } + clk_enable(gpio_port->clk); + + if (of_irq_to_resource_table(node, &irqres, 1) == 1) { + gpio_port->irq_base = INT_NUM_EXTRA_START + (32 * *bank); + gpio_port->gpio_chip.to_irq = falcon_gpio_to_irq; + gpio_port->chained_irq = irqres.start; + irq_domain_add_legacy(node, size, gpio_port->irq_base, 0, + &irq_domain_ops, gpio_port); + setup_irq(irqres.start, &gpio_cascade); + irq_set_handler_data(irqres.start, gpio_port); + irq_set_chained_handler(irqres.start, falcon_gpio_irq_handler); + } + + ret = gpiochip_add(&gpio_port->gpio_chip); + if (!ret) + platform_set_drvdata(pdev, gpio_port); + + gpio_range->name = "FALCON GPIO"; + gpio_range->id = *bank; + gpio_range->base = gpio_port->gpio_chip.base; + gpio_range->npins = gpio_port->gpio_chip.ngpio; + gpio_range->gc = &gpio_port->gpio_chip; + pinctrl_falcon_add_gpio_range(gpio_range); + + return ret; +} + +static const struct of_device_id falcon_gpio_match[] = { + { .compatible = "lantiq,gpio-falcon" }, + {}, +}; +MODULE_DEVICE_TABLE(of, falcon_gpio_match); + +static struct platform_driver falcon_gpio_driver = { + .probe = falcon_gpio_probe, + .driver = { + .name = "gpio-falcon", + .owner = THIS_MODULE, + .of_match_table = falcon_gpio_match, + }, +}; + +int __init falcon_gpio_init(void) +{ + int ret; + + pr_info("FALC(tm) ON GPIO Driver, (C) 2012 Lantiq Deutschland Gmbh\n"); + ret = platform_driver_register(&falcon_gpio_driver); + if (ret) + pr_err("falcon_gpio: Error registering platform driver!"); + return ret; +} + +subsys_initcall(falcon_gpio_init);