/* * PCI Class, Vendor and Device IDs * * Please keep sorted. */ /* Device classes and subclasses */ #define PCI_CLASS_NOT_DEFINED 0x0000 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001 #define PCI_BASE_CLASS_STORAGE 0x01 #define PCI_CLASS_STORAGE_SCSI 0x0100 #define PCI_CLASS_STORAGE_IDE 0x0101 #define PCI_CLASS_STORAGE_FLOPPY 0x0102 #define PCI_CLASS_STORAGE_IPI 0x0103 #define PCI_CLASS_STORAGE_RAID 0x0104 #define PCI_CLASS_STORAGE_SAS 0x0107 #define PCI_CLASS_STORAGE_OTHER 0x0180 #define PCI_BASE_CLASS_NETWORK 0x02 #define PCI_CLASS_NETWORK_ETHERNET 0x0200 #define PCI_CLASS_NETWORK_TOKEN_RING 0x0201 #define PCI_CLASS_NETWORK_FDDI 0x0202 #define PCI_CLASS_NETWORK_ATM 0x0203 #define PCI_CLASS_NETWORK_OTHER 0x0280 #define PCI_BASE_CLASS_DISPLAY 0x03 #define PCI_CLASS_DISPLAY_VGA 0x0300 #define PCI_CLASS_DISPLAY_XGA 0x0301 #define PCI_CLASS_DISPLAY_3D 0x0302 #define PCI_CLASS_DISPLAY_OTHER 0x0380 #define PCI_BASE_CLASS_MULTIMEDIA 0x04 #define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400 #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401 #define PCI_CLASS_MULTIMEDIA_PHONE 0x0402 #define PCI_CLASS_MULTIMEDIA_OTHER 0x0480 #define PCI_BASE_CLASS_MEMORY 0x05 #define PCI_CLASS_MEMORY_RAM 0x0500 #define PCI_CLASS_MEMORY_FLASH 0x0501 #define PCI_CLASS_MEMORY_OTHER 0x0580 #define PCI_BASE_CLASS_BRIDGE 0x06 #define PCI_CLASS_BRIDGE_HOST 0x0600 #define PCI_CLASS_BRIDGE_ISA 0x0601 #define PCI_CLASS_BRIDGE_EISA 0x0602 #define PCI_CLASS_BRIDGE_MC 0x0603 #define PCI_CLASS_BRIDGE_PCI 0x0604 #define PCI_CLASS_BRIDGE_PCMCIA 0x0605 #define PCI_CLASS_BRIDGE_NUBUS 0x0606 #define PCI_CLASS_BRIDGE_CARDBUS 0x0607 #define PCI_CLASS_BRIDGE_RACEWAY 0x0608 #define PCI_CLASS_BRIDGE_OTHER 0x0680 #define PCI_BASE_CLASS_COMMUNICATION 0x07 #define PCI_CLASS_COMMUNICATION_SERIAL 0x0700 #define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701 #define PCI_CLASS_COMMUNICATION_MULTISERIAL 0x0702 #define PCI_CLASS_COMMUNICATION_MODEM 0x0703 #define PCI_CLASS_COMMUNICATION_OTHER 0x0780 #define PCI_BASE_CLASS_SYSTEM 0x08 #define PCI_CLASS_SYSTEM_PIC 0x0800 #define PCI_CLASS_SYSTEM_PIC_IOAPIC 0x080010 #define PCI_CLASS_SYSTEM_PIC_IOXAPIC 0x080020 #define PCI_CLASS_SYSTEM_DMA 0x0801 #define PCI_CLASS_SYSTEM_TIMER 0x0802 #define PCI_CLASS_SYSTEM_RTC 0x0803 #define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 #define PCI_CLASS_SYSTEM_SDHCI 0x0805 #define PCI_CLASS_SYSTEM_OTHER 0x0880 #define PCI_BASE_CLASS_INPUT 0x09 #define PCI_CLASS_INPUT_KEYBOARD 0x0900 #define PCI_CLASS_INPUT_PEN 0x0901 #define PCI_CLASS_INPUT_MOUSE 0x0902 #define PCI_CLASS_INPUT_SCANNER 0x0903 #define PCI_CLASS_INPUT_GAMEPORT 0x0904 #define PCI_CLASS_INPUT_OTHER 0x0980 #define PCI_BASE_CLASS_DOCKING 0x0a #define PCI_CLASS_DOCKING_GENERIC 0x0a00 #define PCI_CLASS_DOCKING_OTHER 0x0a80 #define PCI_BASE_CLASS_PROCESSOR 0x0b #define PCI_CLASS_PROCESSOR_386 0x0b00 #define PCI_CLASS_PROCESSOR_486 0x0b01 #define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02 #define PCI_CLASS_PROCESSOR_ALPHA 0x0b10 #define PCI_CLASS_PROCESSOR_POWERPC 0x0b20 #define PCI_CLASS_PROCESSOR_MIPS 0x0b30 #define PCI_CLASS_PROCESSOR_CO 0x0b40 #define PCI_BASE_CLASS_SERIAL 0x0c #define PCI_CLASS_SERIAL_FIREWIRE 0x0c00 #define PCI_CLASS_SERIAL_ACCESS 0x0c01 #define PCI_CLASS_SERIAL_SSA 0x0c02 #define PCI_CLASS_SERIAL_USB 0x0c03 #define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300 #define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 #define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 #define PCI_CLASS_SERIAL_FIBER 0x0c04 #define PCI_CLASS_SERIAL_SMBUS 0x0c05 #define PCI_BASE_CLASS_INTELLIGENT 0x0e #define PCI_CLASS_INTELLIGENT_I2O 0x0e00 #define PCI_BASE_CLASS_SATELLITE 0x0f #define PCI_CLASS_SATELLITE_TV 0x0f00 #define PCI_CLASS_SATELLITE_AUDIO 0x0f01 #define PCI_CLASS_SATELLITE_VOICE 0x0f03 #define PCI_CLASS_SATELLITE_DATA 0x0f04 #define PCI_BASE_CLASS_CRYPT 0x10 #define PCI_CLASS_CRYPT_NETWORK 0x1000 #define PCI_CLASS_CRYPT_ENTERTAINMENT 0x1001 #define PCI_CLASS_CRYPT_OTHER 0x1080 #define PCI_BASE_CLASS_SIGNAL_PROCESSING 0x11 #define PCI_CLASS_SP_DPIO 0x1100 #define PCI_CLASS_SP_OTHER 0x1180 #define PCI_CLASS_OTHERS 0xff /* Vendors and devices. Sort key: vendor first, device next. */ #define PCI_VENDOR_ID_DYNALINK 0x0675 #define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702 #define PCI_VENDOR_ID_BERKOM 0x0871 #define PCI_DEVICE_ID_BERKOM_A1T 0xffa1 #define PCI_DEVICE_ID_BERKOM_T_CONCEPT 0xffa2 #define PCI_DEVICE_ID_BERKOM_A4T 0xffa4 #define PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO 0xffa8 #define PCI_VENDOR_ID_COMPAQ 0x0e11 #define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508 #define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc #define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10 #define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32 #define PCI_DEVICE_ID_COMPAQ_NETEL10 0xae34 #define PCI_DEVICE_ID_COMPAQ_TRIFLEX_IDE 0xae33 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3I 0xae35 #define PCI_DEVICE_ID_COMPAQ_NETEL100D 0xae40 #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43 #define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011 #define PCI_DEVICE_ID_COMPAQ_CISS 0xb060 #define PCI_DEVICE_ID_COMPAQ_CISSB 0xb178 #define PCI_DEVICE_ID_COMPAQ_CISSC 0x46 #define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150 #define PCI_VENDOR_ID_NCR 0x1000 #define PCI_VENDOR_ID_LSI_LOGIC 0x1000 #define PCI_DEVICE_ID_NCR_53C810 0x0001 #define PCI_DEVICE_ID_NCR_53C820 0x0002 #define PCI_DEVICE_ID_NCR_53C825 0x0003 #define PCI_DEVICE_ID_NCR_53C815 0x0004 #define PCI_DEVICE_ID_LSI_53C810AP 0x0005 #define PCI_DEVICE_ID_NCR_53C860 0x0006 #define PCI_DEVICE_ID_LSI_53C1510 0x000a #define PCI_DEVICE_ID_NCR_53C896 0x000b #define PCI_DEVICE_ID_NCR_53C895 0x000c #define PCI_DEVICE_ID_NCR_53C885 0x000d #define PCI_DEVICE_ID_NCR_53C875 0x000f #define PCI_DEVICE_ID_NCR_53C1510 0x0010 #define PCI_DEVICE_ID_LSI_53C895A 0x0012 #define PCI_DEVICE_ID_LSI_53C875A 0x0013 #define PCI_DEVICE_ID_LSI_53C1010_33 0x0020 #define PCI_DEVICE_ID_LSI_53C1010_66 0x0021 #define PCI_DEVICE_ID_LSI_53C1030 0x0030 #define PCI_DEVICE_ID_LSI_1030_53C1035 0x0032 #define PCI_DEVICE_ID_LSI_53C1035 0x0040 #define PCI_DEVICE_ID_NCR_53C875J 0x008f #define PCI_DEVICE_ID_LSI_FC909 0x0621 #define PCI_DEVICE_ID_LSI_FC929 0x0622 #define PCI_DEVICE_ID_LSI_FC929_LAN 0x0623 #define PCI_DEVICE_ID_LSI_FC919 0x0624 #define PCI_DEVICE_ID_LSI_FC919_LAN 0x0625 #define PCI_DEVICE_ID_LSI_FC929X 0x0626 #define PCI_DEVICE_ID_LSI_FC939X 0x0642 #define PCI_DEVICE_ID_LSI_FC949X 0x0640 #define PCI_DEVICE_ID_LSI_FC949ES 0x0646 #define PCI_DEVICE_ID_LSI_FC919X 0x0628 #define PCI_DEVICE_ID_NCR_YELLOWFIN 0x0701 #define PCI_DEVICE_ID_LSI_61C102 0x0901 #define PCI_DEVICE_ID_LSI_63C815 0x1000 #define PCI_DEVICE_ID_LSI_SAS1064 0x0050 #define PCI_DEVICE_ID_LSI_SAS1064R 0x0411 #define PCI_DEVICE_ID_LSI_SAS1066 0x005E #define PCI_DEVICE_ID_LSI_SAS1068 0x0054 #define PCI_DEVICE_ID_LSI_SAS1064A 0x005C #define PCI_DEVICE_ID_LSI_SAS1064E 0x0056 #define PCI_DEVICE_ID_LSI_SAS1066E 0x005A #define PCI_DEVICE_ID_LSI_SAS1068E 0x0058 #define PCI_DEVICE_ID_LSI_SAS1078 0x0060 #define PCI_VENDOR_ID_ATI 0x1002 /* Mach64 */ #define PCI_DEVICE_ID_ATI_68800 0x4158 #define PCI_DEVICE_ID_ATI_215CT222 0x4354 #define PCI_DEVICE_ID_ATI_210888CX 0x4358 #define PCI_DEVICE_ID_ATI_215ET222 0x4554 /* Mach64 / Rage */ #define PCI_DEVICE_ID_ATI_215GB 0x4742 #define PCI_DEVICE_ID_ATI_215GD 0x4744 #define PCI_DEVICE_ID_ATI_215GI 0x4749 #define PCI_DEVICE_ID_ATI_215GP 0x4750 #define PCI_DEVICE_ID_ATI_215GQ 0x4751 #define PCI_DEVICE_ID_ATI_215XL 0x4752 #define PCI_DEVICE_ID_ATI_215GT 0x4754 #define PCI_DEVICE_ID_ATI_215GTB 0x4755 #define PCI_DEVICE_ID_ATI_215_IV 0x4756 #define PCI_DEVICE_ID_ATI_215_IW 0x4757 #define PCI_DEVICE_ID_ATI_215_IZ 0x475A #define PCI_DEVICE_ID_ATI_210888GX 0x4758 #define PCI_DEVICE_ID_ATI_215_LB 0x4c42 #define PCI_DEVICE_ID_ATI_215_LD 0x4c44 #define PCI_DEVICE_ID_ATI_215_LG 0x4c47 #define PCI_DEVICE_ID_ATI_215_LI 0x4c49 #define PCI_DEVICE_ID_ATI_215_LM 0x4c4D #define PCI_DEVICE_ID_ATI_215_LN 0x4c4E #define PCI_DEVICE_ID_ATI_215_LR 0x4c52 #define PCI_DEVICE_ID_ATI_215_LS 0x4c53 #define PCI_DEVICE_ID_ATI_264_LT 0x4c54 /* Mach64 VT */ #define PCI_DEVICE_ID_ATI_264VT 0x5654 #define PCI_DEVICE_ID_ATI_264VU 0x5655 #define PCI_DEVICE_ID_ATI_264VV 0x5656 /* Rage128 GL */ #define PCI_DEVICE_ID_ATI_RAGE128_RE 0x5245 #define PCI_DEVICE_ID_ATI_RAGE128_RF 0x5246 #define PCI_DEVICE_ID_ATI_RAGE128_RG 0x5247 /* Rage128 VR */ #define PCI_DEVICE_ID_ATI_RAGE128_RK 0x524b #define PCI_DEVICE_ID_ATI_RAGE128_RL 0x524c #define PCI_DEVICE_ID_ATI_RAGE128_SE 0x5345 #define PCI_DEVICE_ID_ATI_RAGE128_SF 0x5346 #define PCI_DEVICE_ID_ATI_RAGE128_SG 0x5347 #define PCI_DEVICE_ID_ATI_RAGE128_SH 0x5348 #define PCI_DEVICE_ID_ATI_RAGE128_SK 0x534b #define PCI_DEVICE_ID_ATI_RAGE128_SL 0x534c #define PCI_DEVICE_ID_ATI_RAGE128_SM 0x534d #define PCI_DEVICE_ID_ATI_RAGE128_SN 0x534e /* Rage128 Ultra */ #define PCI_DEVICE_ID_ATI_RAGE128_TF 0x5446 #define PCI_DEVICE_ID_ATI_RAGE128_TL 0x544c #define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452 #define PCI_DEVICE_ID_ATI_RAGE128_TS 0x5453 #define PCI_DEVICE_ID_ATI_RAGE128_TT 0x5454 #define PCI_DEVICE_ID_ATI_RAGE128_TU 0x5455 /* Rage128 M3 */ #define PCI_DEVICE_ID_ATI_RAGE128_LE 0x4c45 #define PCI_DEVICE_ID_ATI_RAGE128_LF 0x4c46 /* Rage128 M4 */ #define PCI_DEVICE_ID_ATI_RAGE128_MF 0x4d46 #define PCI_DEVICE_ID_ATI_RAGE128_ML 0x4d4c /* Rage128 Pro GL */ #define PCI_DEVICE_ID_ATI_RAGE128_PA 0x5041 #define PCI_DEVICE_ID_ATI_RAGE128_PB 0x5042 #define PCI_DEVICE_ID_ATI_RAGE128_PC 0x5043 #define PCI_DEVICE_ID_ATI_RAGE128_PD 0x5044 #define PCI_DEVICE_ID_ATI_RAGE128_PE 0x5045 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046 /* Rage128 Pro VR */ #define PCI_DEVICE_ID_ATI_RAGE128_PG 0x5047 #define PCI_DEVICE_ID_ATI_RAGE128_PH 0x5048 #define PCI_DEVICE_ID_ATI_RAGE128_PI 0x5049 #define PCI_DEVICE_ID_ATI_RAGE128_PJ 0x504A #define PCI_DEVICE_ID_ATI_RAGE128_PK 0x504B #define PCI_DEVICE_ID_ATI_RAGE128_PL 0x504C #define PCI_DEVICE_ID_ATI_RAGE128_PM 0x504D #define PCI_DEVICE_ID_ATI_RAGE128_PN 0x504E #define PCI_DEVICE_ID_ATI_RAGE128_PO 0x504F #define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050 #define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051 #define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052 #define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053 #define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054 #define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055 #define PCI_DEVICE_ID_ATI_RAGE128_PV 0x5056 #define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057 #define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058 /* Rage128 M4 */ /* Radeon R100 */ #define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144 #define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145 #define PCI_DEVICE_ID_ATI_RADEON_QF 0x5146 #define PCI_DEVICE_ID_ATI_RADEON_QG 0x5147 /* Radeon RV100 (VE) */ #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 #define PCI_DEVICE_ID_ATI_RADEON_QZ 0x515a /* Radeon R200 (8500) */ #define PCI_DEVICE_ID_ATI_RADEON_QL 0x514c #define PCI_DEVICE_ID_ATI_RADEON_QN 0x514e #define PCI_DEVICE_ID_ATI_RADEON_QO 0x514f #define PCI_DEVICE_ID_ATI_RADEON_Ql 0x516c #define PCI_DEVICE_ID_ATI_RADEON_BB 0x4242 /* Radeon R200 (9100) */ #define PCI_DEVICE_ID_ATI_RADEON_QM 0x514d /* Radeon RV200 (7500) */ #define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157 #define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158 /* Radeon NV-100 */ /* Radeon RV250 (9000) */ #define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964 #define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965 #define PCI_DEVICE_ID_ATI_RADEON_If 0x4966 #define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967 /* Radeon RV280 (9200) */ #define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961 #define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964 /* Radeon R300 (9500) */ /* Radeon R300 (9700) */ #define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44 #defin
/*
* netlink/socket.h Netlink Socket
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation version 2.1
* of the License.
*
* Copyright (c) 2003-2008 Thomas Graf <tgraf@suug.ch>
*/
#ifndef NETLINK_SOCKET_H_
#define NETLINK_SOCKET_H_
#include <netlink/types.h>
#include <netlink/handlers.h>
#ifdef __cplusplus
extern "C" {
#endif
#define NL_SOCK_BUFSIZE_SET (1<<0)
#define NL_SOCK_PASSCRED (1<<1)
#define NL_OWN_PORT (1<<2)
#define NL_MSG_PEEK (1<<3)
#define NL_NO_AUTO_ACK (1<<4)
struct nl_cb;
struct nl_sock
{
struct sockaddr_nl s_local;
struct sockaddr_nl s_peer;
int s_fd;
int s_proto;
unsigned int s_seq_next;
unsigned int s_seq_expect;
int s_flags;
struct nl_cb * s_cb;
};
extern struct nl_sock * nl_socket_alloc(void);
extern struct nl_sock * nl_socket_alloc_cb(struct nl_cb *);
extern void nl_socket_free(struct nl_sock *);
extern void nl_socket_set_local_port(struct nl_sock *, uint32_t);
extern int nl_socket_add_memberships(struct nl_sock *, int, ...);
extern int nl_socket_drop_memberships(struct nl_sock *, int, ...);
extern int nl_socket_set_buffer_size(struct nl_sock *, int, int);
extern int nl_socket_set_passcred(struct nl_sock *, int);
extern int nl_socket_recv_pktinfo(struct nl_sock *, int);
extern void nl_socket_disable_seq_check(struct nl_sock *);
extern int nl_socket_set_nonblocking(struct nl_sock *);
/**
* Use next sequence number
* @arg sk Netlink socket.
*
* Uses the next available sequence number and increases the counter
* by one for subsequent calls.
*
* @return Unique serial sequence number
*/
static inline unsigned int nl_socket_use_seq(struct nl_sock *sk)
{
return sk->s_seq_next++;
}
/**
* Disable automatic request for ACK
* @arg sk Netlink socket.
*
* The default behaviour of a socket is to request an ACK for
* each message sent to allow for the caller to synchronize to
* the completion of the netlink operation. This function
* disables this behaviour and will result in requests being
* sent which will not have the NLM_F_ACK flag set automatically.
* However, it is still possible for the caller to set the
* NLM_F_ACK flag explicitely.
*/
static inline void nl_socket_disable_auto_ack(struct nl_sock *sk)
{
sk->s_flags |= NL_NO_AUTO_ACK;
}
/**
* Enable automatic request for ACK (default)
* @arg sk Netlink socket.
* @see nl_socket_disable_auto_ack
*/
static inline void nl_socket_enable_auto_ack(struct nl_sock *sk)
{
sk->s_flags &= ~NL_NO_AUTO_ACK;
}
/**
* @name Source Idenficiation
* @{
*/
static inline uint32_t nl_socket_get_local_port(struct nl_sock *sk)
{
return sk->s_local.nl_pid;
}
/**
* Join multicast groups (deprecated)
* @arg sk Netlink socket.
* @arg groups Bitmask of groups to join.
*
* This function defines the old way of joining multicast group which
* has to be done prior to calling nl_connect(). It works on any kernel
* version but is very limited as only 32 groups can be joined.
*/
static inline void nl_join_groups(struct nl_sock *sk, int groups)
{
sk->s_local.nl_groups |= groups;
}
/**
* @name Peer Identfication
* @{
*/
static inline uint32_t nl_socket_get_peer_port(struct nl_sock *sk)
{
return sk->s_peer.nl_pid;
}
static inline void nl_socket_set_peer_port(struct nl_sock *sk, uint32_t port)
{
sk->s_peer.nl_pid = port;
}
/** @} */
/**
* @name File Descriptor
* @{
*/
static inline int nl_socket_get_fd(struct nl_sock *sk)
{
return sk->s_fd;
}
/**
* Enable use of MSG_PEEK when reading from socket
* @arg sk Netlink socket.
*/
static inline void nl_socket_enable_msg_peek(struct nl_sock *sk)
{
sk->s_flags |= NL_MSG_PEEK;
}
/**
* Disable use of MSG_PEEK when reading from socket
* @arg sk Netlink socket.
*/
static inline void nl_socket_disable_msg_peek(struct nl_sock *sk)
{
sk->s_flags &= ~NL_MSG_PEEK;
}
/**
* @name Callback Handler
* @{
*/
static inline struct nl_cb *nl_socket_get_cb(struct nl_sock *sk)
{
return nl_cb_get(sk->s_cb);
}
static inline void nl_socket_set_cb(struct nl_sock *sk, struct nl_cb *cb)
{
nl_cb_put(sk->s_cb);
sk->s_cb = nl_cb_get(cb);
}
/**
* Modify the callback handler associated to the socket
* @arg sk Netlink socket.
* @arg type which type callback to set
* @arg kind kind of callback
* @arg func callback function
* @arg arg argument to be passwd to callback function
*
* @see nl_cb_set
*/
static inline int nl_socket_modify_cb(struct nl_sock *sk, enum nl_cb_type type,
enum nl_cb_kind kind, nl_recvmsg_msg_cb_t func,
void *arg)
{
return nl_cb_set(sk->s_cb, type, kind, func, arg);
}
/** @} */
static inline int nl_socket_add_membership(struct nl_sock *sk, int group)
{
return nl_socket_add_memberships(sk, group, 0);
}
static inline int nl_socket_drop_membership(struct nl_sock *sk, int group)
{
return nl_socket_drop_memberships(sk, group, 0);
}
#ifdef __cplusplus
}
#endif
#endif