aboutsummaryrefslogtreecommitdiffstats
path: root/package/kernel/lantiq/ltq-vdsl-mei/patches/100-compat.patch
blob: 0273d19850c237cb1ec962370d75357ced8a3b8c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
--- a/src/drv_mei_cpe_common.c
+++ b/src/drv_mei_cpe_common.c
@@ -19,7 +19,6 @@
 /* get at first the driver configuration */
 #include "drv_mei_cpe_config.h"
 
-#include "ifx_types.h"
 #include "drv_mei_cpe_os.h"
 #include "drv_mei_cpe_dbg.h"
 
--- a/src/drv_mei_cpe_linux.h
+++ b/src/drv_mei_cpe_linux.h
@@ -51,12 +51,6 @@
 #include <linux/poll.h>
 #include <linux/types.h>
 
-#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
-   #include <asm/ifx/ifx_types.h>
-#else
-   #include <ifx_types.h>
-#endif
-
 #endif /* #if (MEI_DRV_IFXOS_ENABLE == 0)*/
 
 /* ============================================================================
--- a/src/drv_mei_cpe_linux.c
+++ b/src/drv_mei_cpe_linux.c
@@ -98,6 +98,8 @@
 
 #include "drv_mei_cpe_api_atm_ptm_intern.h"
 
+#include <lantiq_soc.h>
+
 /* ===================================
    extern function declarations
    =================================== */
@@ -196,6 +198,8 @@ static void MEI_MemVAllocTest();
 /* Local variables (LINUX)             */
 /* =================================== */
 static IFX_uint8_t major_number = 0;
+static struct class *mei_class;
+static dev_t mei_devt;
 #ifdef MODULE
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0))
 MODULE_PARM(major_number, "b");
@@ -1798,7 +1802,9 @@ static int __init MEI_module_init (void)
       return (result);
    }
 
+#if 0
    ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)ltq_mei_atm_showtime_check);
+#endif
 
    return 0;
 }
@@ -1922,6 +1928,10 @@ static void MEI_module_exit (void)
 
 #else
    unregister_chrdev ( major_number , DRV_MEI_NAME );
+   device_destroy(mei_class, mei_devt);
+   mei_devt = 0;
+   class_destroy(mei_class);
+   mei_class = NULL;
 #endif
 
 #if CONFIG_PROC_FS
@@ -1978,7 +1988,9 @@ static void MEI_module_exit (void)
             ("MEI_DRV: Chipset Basic Exit failed" MEI_DRV_CRLF));
    }
 
+#if 0
    ppa_callback_set(LTQ_MEI_SHOWTIME_CHECK, (void *)NULL);
+#endif
 
    /* touch one time this variable to avoid that the linker will remove it */
    debug_level = MEI_DRV_PRN_LEVEL_OFF;
@@ -2095,6 +2107,10 @@ static int MEI_InitModuleRegCharDev(cons
             ("Using major number %d" MEI_DRV_CRLF, major_number));
    }
 
+   mei_class = class_create(THIS_MODULE, devName);
+   mei_devt = MKDEV(major_number, 0);
+   device_create(mei_class, NULL, mei_devt, NULL, "%s/%i", devName, 0);
+
    return 0;
 #endif      /* CONFIG_DEVFS_FS */
 }
@@ -2135,21 +2151,32 @@ static int MEI_InitModuleBasics(void)
 }
 
 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0))
+
+#define PMU_DFE         BIT(9)
+
 static int MEI_SysClkEnable(struct clk *clk)
 {
+#if 0
    if (IS_ERR(clk))
       return -1;
    clk_enable(clk);
+#else
+   ltq_pmu_enable(PMU_DFE);
+#endif
 
    return 0;
 }
 
 static int MEI_SysClkDisable(struct clk *clk)
 {
+#if 0
    if (IS_ERR(clk))
       return -1;
    clk_disable(clk);
    clk_put(clk);
+#else
+   ltq_pmu_disable(PMU_DFE);
+#endif
 
    return 0;
 }
@@ -2469,11 +2496,15 @@ IFX_int32_t MEI_IoctlInitDevice(
             pMeiDev->eModePoll = e_MEI_DEV_ACCESS_MODE_IRQ;
             pMeiDev->intMask   = ME_ARC2ME_INTERRUPT_UNMASK_ALL;
 
+#if 1
+            virq = (IFX_uint32_t)pInitDev->usedIRQ;
+#else
 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0))
             virq = (IFX_uint32_t)pInitDev->usedIRQ;
 #else
             virq = irq_create_mapping(NULL, (IFX_uint32_t)pInitDev->usedIRQ);
 #endif
+#endif
 
             pTmpXCntrl = MEI_VrxXDevToIrqListAdd(
                                           MEI_DRV_LINENUM_GET(pMeiDev),
--- a/src/drv_mei_cpe_api_atm_ptm_intern.c
+++ b/src/drv_mei_cpe_api_atm_ptm_intern.c
@@ -193,6 +193,51 @@ int ifx_mei_atm_led_blink(void)
     return IFX_SUCCESS;
 }
 
+#if MEI_MAX_DFE_CHAN_DEVICES > 1
+#error "Compat functions do not support MEI_MAX_DFE_CHAN_DEVICES > 1 yet"
+#else
+int (*ifx_mei_atm_showtime_enter)(struct port_cell_info *, void *) = NULL;
+int (*ifx_mei_atm_showtime_exit)(void) = NULL;
+
+int ltq_ifx_mei_atm_showtime_enter_compat(IFX_uint8_t dslLineNum,
+				      struct port_cell_info *cellInfo,
+				      void *xdata) {
+	if (ifx_mei_atm_showtime_enter)
+		return ifx_mei_atm_showtime_enter(cellInfo, xdata);
+
+	return -e_MEI_ERR_OP_FAILED;
+}
+
+int ltq_ifx_mei_atm_showtime_exit_compat(IFX_uint8_t dslLineNum) {
+	if (ifx_mei_atm_showtime_exit)
+		return ifx_mei_atm_showtime_exit();
+
+	return -e_MEI_ERR_OP_FAILED;
+}
+
+void* ppa_callback_get(e_ltq_mei_cb_type type) {
+	switch (type) {
+		case LTQ_MEI_SHOWTIME_ENTER:
+			return &ltq_ifx_mei_atm_showtime_enter_compat;
+		case LTQ_MEI_SHOWTIME_EXIT:
+			return &ltq_ifx_mei_atm_showtime_exit_compat;
+			break;
+	}
+
+	BUG();
+}
+
+int ifx_mei_atm_showtime_check(int *is_showtime,
+                              struct port_cell_info *port_cell,
+                              void **xdata_addr) {
+	return ltq_mei_atm_showtime_check(0, is_showtime, port_cell, xdata_addr);
+}
+
+EXPORT_SYMBOL(ifx_mei_atm_showtime_enter);
+EXPORT_SYMBOL(ifx_mei_atm_showtime_exit);
+EXPORT_SYMBOL(ifx_mei_atm_showtime_check);
+#endif
+
 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeEntrySignal);
 EXPORT_SYMBOL (MEI_InternalXtmSwhowtimeExitSignal);
 EXPORT_SYMBOL(ifx_mei_atm_led_blink);
--- a/src/drv_mei_cpe_api_atm_ptm_intern.h
+++ b/src/drv_mei_cpe_api_atm_ptm_intern.h
@@ -21,7 +21,6 @@
 
 #include "drv_mei_cpe_config.h"
 #include "drv_mei_cpe_interface.h"
-#include <net/ppa_stack_al.h>
 
 #if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
 
@@ -42,8 +41,21 @@ extern IFX_int32_t MEI_InternalXtmSwhowt
                               MEI_DYN_CNTRL_T        *pMeiDynCntrl,
                               MEI_XTM_ShowtimeExit_t *pArgXtm);
 
+#if 1
+#include <lantiq_atm.h>
+typedef enum {
+	LTQ_MEI_SHOWTIME_ENTER,
+	LTQ_MEI_SHOWTIME_EXIT
+} e_ltq_mei_cb_type;
+
+typedef void (*ltq_mei_atm_showtime_enter_t)(IFX_uint8_t, struct port_cell_info *, void *);
+typedef void (*ltq_mei_atm_showtime_exit_t)(IFX_uint8_t);
+
+void* ppa_callback_get(e_ltq_mei_cb_type type);
+#else
 extern int ppa_callback_set(e_ltq_mei_cb_type type, void *func);
 extern void* ppa_callback_get(e_ltq_mei_cb_type type);
+#endif
 
 int ltq_mei_atm_showtime_check (
                               const unsigned char line_idx,
--- a/src/drv_mei_cpe_device_vrx.c
+++ b/src/drv_mei_cpe_device_vrx.c
@@ -28,13 +28,6 @@
 #include "drv_mei_cpe_api.h"
 #include "drv_mei_cpe_mei_vrx.h"
 
-#if defined(LINUX)
-#  if (LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0))
-#    include "ifx_pcie.h"
-#  else
-#    include "lantiq_pcie.h"
-#  endif
-#endif /* #if defined(LINUX)*/
 
 IFX_int32_t MEI_GPIntProcess(MEI_MeiRegVal_t processInt, MEI_DEV_T *pMeiDev)
 {
@@ -82,6 +75,7 @@ IFX_int32_t MEI_GetChipInfo(MEI_DEV_T *p
 */
 IFX_int32_t MEI_VR10_PcieEntitiesCheck(IFX_uint8_t nEntityNum)
 {
+#if 0
    IFX_uint32_t pcie_entitiesNum;
 
    /* get information from pcie driver */
@@ -102,6 +96,9 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
    }
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 /**
@@ -116,6 +113,7 @@ IFX_int32_t MEI_VR10_PcieEntitiesCheck(I
 */
 IFX_int32_t MEI_VR10_PcieEntityInit(MEI_MEI_DRV_CNTRL_T *pMeiDrvCntrl)
 {
+#if 0
    IFX_uint8_t entityNum;
    ifx_pcie_ep_dev_t MEI_pcie_ep_dev;
 
@@ -138,6 +136,9 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
    pMeiDrvCntrl->MEI_pcie_irq = MEI_pcie_ep_dev.irq;
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 /**
@@ -152,6 +153,7 @@ IFX_int32_t MEI_VR10_PcieEntityInit(MEI_
 */
 IFX_int32_t MEI_VR10_PcieEntityFree(IFX_uint8_t entityNum)
 {
+#if 0
    if (ifx_pcie_ep_dev_info_release(entityNum))
    {
       PRN_ERR_USR_NL( MEI_DRV, MEI_DRV_PRN_LEVEL_ERR,
@@ -161,6 +163,9 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
    }
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 /**
@@ -175,6 +180,7 @@ IFX_int32_t MEI_VR10_PcieEntityFree(IFX_
 */
 IFX_int32_t MEI_VR10_InternalInitDevice(MEI_DYN_CNTRL_T *pMeiDynCntrl)
 {
+#if 0
    IFX_int32_t         retVal;
    IOCTL_MEI_devInit_t InitDev;
    MEI_DEV_T           *pMeiDev = pMeiDynCntrl->pMeiDev;
@@ -199,6 +205,9 @@ IFX_int32_t MEI_VR10_InternalInitDevice(
    *MEI_GPIO_U32REG(GPIO_P0_ALSEL1) &= ~((1 << 0) | (1 << 3) | (1 << 8));
 
    return IFX_SUCCESS;
+#else
+   return IFX_ERROR;
+#endif
 }
 
 IFX_int32_t MEI_PLL_ConfigInit(MEI_DEV_T *pMeiDev)