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From 7237a6a0c020c05bb819774391154b40b2cfaabd Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Fri, 20 May 2022 11:23:42 +0800
Subject: [PATCH 19/25] net: mediatek: add support for MediaTek MT7621 SoC
This patch adds GMAC support for MediaTek MT7621 SoC.
MT7621 has the same GMAC/Switch configuration as MT7623.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/net/mtk_eth.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -145,7 +145,8 @@ enum mtk_switch {
enum mtk_soc {
SOC_MT7623,
SOC_MT7629,
- SOC_MT7622
+ SOC_MT7622,
+ SOC_MT7621
};
struct mtk_eth_priv {
@@ -675,12 +676,18 @@ static int mt7530_pad_clk_setup(struct m
static int mt7530_setup(struct mtk_eth_priv *priv)
{
u16 phy_addr, phy_val;
- u32 val;
+ u32 val, txdrv;
int i;
- /* Select 250MHz clk for RGMII mode */
- mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG,
- ETHSYS_TRGMII_CLK_SEL362_5, 0);
+ if (priv->soc != SOC_MT7621) {
+ /* Select 250MHz clk for RGMII mode */
+ mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG,
+ ETHSYS_TRGMII_CLK_SEL362_5, 0);
+
+ txdrv = 8;
+ } else {
+ txdrv = 4;
+ }
/* Modify HWTRAP first to allow direct access to internal PHYs */
mt753x_reg_read(priv, HWTRAP_REG, &val);
@@ -738,7 +745,8 @@ static int mt7530_setup(struct mtk_eth_p
/* Lower Tx Driving for TRGMII path */
for (i = 0 ; i < NUM_TRGMII_CTRL ; i++)
mt753x_reg_write(priv, MT7530_TRGMII_TD_ODT(i),
- (8 << TD_DM_DRVP_S) | (8 << TD_DM_DRVN_S));
+ (txdrv << TD_DM_DRVP_S) |
+ (txdrv << TD_DM_DRVN_S));
for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
mt753x_reg_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_M, 16);
@@ -1540,6 +1548,7 @@ static const struct udevice_id mtk_eth_i
{ .compatible = "mediatek,mt7629-eth", .data = SOC_MT7629 },
{ .compatible = "mediatek,mt7623-eth", .data = SOC_MT7623 },
{ .compatible = "mediatek,mt7622-eth", .data = SOC_MT7622 },
+ { .compatible = "mediatek,mt7621-eth", .data = SOC_MT7621 },
{}
};
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