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From ed880b7572e1135e3bd8382d4670a375f7d9c91b Mon Sep 17 00:00:00 2001
From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 2 Mar 2021 15:56:17 +0800
Subject: [PATCH 10/21] mmc: mtk-sd: increase the minimum bus frequency
With a 48MHz input clock, the lowest bus frequency can be as low as
48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
the mmc framework take seconds to finish the initialization.
Limiting the minimum bus frequency to a slightly higher value can solve the
issue without any side effects.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
---
drivers/mmc/mtk-sd.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/mmc/mtk-sd.c
+++ b/drivers/mmc/mtk-sd.c
@@ -232,6 +232,8 @@
#define SCLK_CYCLES_SHIFT 20
+#define MIN_BUS_CLK 260000
+
#define CMD_INTS_MASK \
(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
@@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice
else
cfg->f_min = host->src_clk_freq / (4 * 4095);
+ if (cfg->f_min < MIN_BUS_CLK)
+ cfg->f_min = MIN_BUS_CLK;
+
if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
cfg->f_max = host->src_clk_freq;
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