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From 9e157635c191762624c066d14e360e972aa1ad0f Mon Sep 17 00:00:00 2001
From: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Date: Wed, 20 Jul 2016 15:44:58 +0800
Subject: [PATCH 82/93] armv8: ls1012a: Update DDR timing
Update MMDC timing CL-tRCD-tRP to 7-7-7.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
---
board/freescale/ls1012afrdm/ls1012afrdm.c | 2 +-
board/freescale/ls1012aqds/ls1012aqds.c | 2 +-
board/freescale/ls1012ardb/ls1012ardb.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
index 04f8f9a..a152a18 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -55,7 +55,7 @@ void mmdc_init(void)
/* configure timing parms */
out_be32(&mmdc->mdotc, 0x12554000);
out_be32(&mmdc->mdcfg0, 0xbabf7954);
- out_be32(&mmdc->mdcfg1, 0xff328f64);
+ out_be32(&mmdc->mdcfg1, 0xdb328f64);
out_be32(&mmdc->mdcfg2, 0x01ff00db);
/* other parms */
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 4ae8def..7bdb591 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -78,7 +78,7 @@ void mmdc_init(void)
/* configure timing parms */
out_be32(&mmdc->mdotc, 0x12554000);
out_be32(&mmdc->mdcfg0, 0xbabf7954);
- out_be32(&mmdc->mdcfg1, 0xff328f64);
+ out_be32(&mmdc->mdcfg1, 0xdb328f64);
out_be32(&mmdc->mdcfg2, 0x01ff00db);
/* other parms */
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 06e1f6b..ac51d56 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -84,7 +84,7 @@ void mmdc_init(void)
/* configure timing parms */
out_be32(&mmdc->mdotc, 0x12554000);
out_be32(&mmdc->mdcfg0, 0xbabf7954);
- out_be32(&mmdc->mdcfg1, 0xff328f64);
+ out_be32(&mmdc->mdcfg1, 0xdb328f64);
out_be32(&mmdc->mdcfg2, 0x01ff00db);
/* other parms */
--
1.7.9.5
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