From b434c5aa38e2db0fff9fa39c6e47cc9d13afe8e1 Mon Sep 17 00:00:00 2001 From: arokux Date: Thu, 19 Sep 2013 21:36:10 +0200 Subject: [PATCH] ARM: sun7i: dt: Add USB EHCI bindings --- arch/arm/boot/dts/sun7i-a20.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 4fe484c..b4e4a5a 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -16,6 +16,11 @@ / { interrupt-parent = <&gic>; + aliases { + ehci1 = &ehci0; + ehci2 = &ehci1; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -434,5 +439,33 @@ #interrupt-cells = <3>; interrupts = <1 9 0xf04>; }; + + usb_rst: reset@0x01c200cc { + #reset-cells = <1>; + compatible = "allwinner,sun4i-clock-reset"; + reg = <0x01c200cc 0x4>; + }; + + ehci0: ehci0@0x01c14000 { + compatible = "allwinner,sunxi-ehci"; + reg = <0x01c14000 0x400 0x01c14800 0x4 0x01c13404 0x4>; + interrupts = <0 39 1>; + resets = <&usb_rst 1>; + reset-names = "ehci_reset"; + clocks = <&usb 8>, <&ahb_gates 1>; + clock-names = "usb_phy", "ahb_ehci"; + status = "disabled"; + }; + + ehci1: ehci1@0x01c1c000 { + compatible = "allwinner,sunxi-ehci"; + reg = <0x01c1c000 0x400 0x01c1c800 0x4 0x01c13404 0x4>; + interrupts = <0 40 1>; + resets = <&usb_rst 2>; + reset-names = "ehci_reset"; + clocks = <&usb 8>, <&ahb_gates 3>; + clock-names = "usb_phy", "ahb_ehci"; + status = "disabled"; + }; }; }; -- 1.8.4