// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /dts-v1/; #define STRINGIZE(s) #s #define LAN_LABEL(p, s) STRINGIZE(p ## s) #define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n) #define INTERNAL_PHY(n) \ phy##n: ethernet-phy@##n { \ reg = <##n>; \ compatible = "ethernet-phy-ieee802.3-c22"; \ phy-is-integrated; \ }; #define EXTERNAL_PHY(n) \ phy##n: ethernet-phy@##n { \ reg = <##n>; \ compatible = "ethernet-phy-ieee802.3-c22"; \ }; #define EXTERNAL_SFP_PHY(n) \ phy##n: ethernet-phy@##n { \ compatible = "ethernet-phy-ieee802.3-c22"; \ sfp; \ media = "fibre"; \ reg = <##n>; \ }; #define SWITCH_PORT(n, s, m) \ port@##n { \ reg = <##n>; \ label = SWITCH_PORT_LABEL(s) ; \ phy-handle = <&phy##n>; \ phy-mode = #m ; \ }; #define SWITCH_SFP_PORT(n, s, m) \ port@##n { \ reg = <##n>; \ label = SWITCH_PORT_LABEL(s) ; \ phy-handle = <&phy##n>; \ phy-mode = #m ; \ fixed-link { \ speed = <1000>; \ full-duplex; \ }; \ }; / { #address-cells = <1>; #size-cells = <1>; compatible = "realtek,rtl839x-soc"; cpus { #address-cells = <1>; #size-cells = <0>; frequency = <700000000>; cpu@0 { compatible = "mips,mips34Kc"; reg = <0>; }; }; chosen { bootargs = "console=ttyS0,115200"; }; lx_clk: lx_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; }; cpuintc: cpuintc { compatible = "mti,cpu-interrupt-controller"; #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; }; soc: soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x18000000 0x10000>; intc: interrupt-controller@3000 { compatible = "realtek,rtl8390-intc", "realtek,rtl-intc"; reg = <0x3000 0x18>, <0x3018 0x18>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&cpuintc>; interrupts = <2>, <3>, <4>, <5>, <6>; }; spi0: spi@1200 { compatible = "realtek,rtl8380-spi"; reg = <0x1200 0x100>; #address-cells = <1>; #size-cells = <0>; }; uart0: uart@2000 { compatible = "ns16550a"; reg = <0x2000 0x100>; clocks = <&lx_clk>; interrupt-parent = <&intc>; interrupts = <31 1>; reg-io-width = <1>; reg-shift = <2>; fifo-size = <1>; no-loopback-test; }; uart1: uart@2100 { pinctrl-names = "default"; pinctrl-0 = <&enable_uart1>; compatible = "ns16550a"; reg = <0x2100 0x100>; clocks = <&lx_clk>; interrupt-parent = <&intc>; interrupts = <30 2>; reg-io-width = <1>; reg-shift = <2>; fifo-size = <1>; no-loopback-test; status = "disabled"; }; gpio0: gpio-controller@3500 { compatible = "realtek,rtl8390-gpio", "realtek,otto-gpio"; reg = <0x3500 0x20>; gpio-controller; #gpio-cells = <2>; ngpios = <24>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&intc>; interrupts = <23 2>; }; watchdog0: watchdog@3150 { compatible = "realtek,rtl8390-wdt"; reg = <0x3150 0xc>; realtek,reset-mode = "soc"; clocks = <&lx_clk>; timeout-sec = <30>; interrupt-parent = <&intc>; interrupt-names = "phase1", "phase2"; interrupts = <19 4>, <18 4>; }; }; pinmux@1b000004 { compatible = "pinctrl-single"; reg = <0x1b000004 0x4>; pinctrl-single,bit-per-mux; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x1>; #pinctrl-cells = <2>; enable_uart1: pinmux_enable_uart1 { pinctrl-single,bits = <0x0 0x1 0x3>; }; }; /* LED_GLB_CTRL */ pinmux@1b0000e4 { compatible = "pinctrl-single"; reg = <0x1b0000e4 0x4>; pinctrl-single,bit-per-mux; pinctrl-single,register-width = <32>; pinctrl-single,function-mask = <0x1>; #pinctrl-cells = <2>; /* enable GPIO 0 */ pinmux_disable_sys_led: disable_sys_led { pinctrl-single,bits = <0x0 0x0 0x4000>; }; }; ethernet0: ethernet@1b00a300 { compatible = "realtek,rtl838x-eth"; reg = <0x1b00a300 0x100>; interrupt-parent = <&intc>; interrupts = <24 3>; phy-mode = "internal"; fixed-link { speed = <1000>; full-duplex; }; }; switch0: switch@1b000000 { status = "okay"; compatible = "realtek,rtl83xx-switch"; interrupt-parent = <&intc>; interrupts = <20 2>; }; };