/dts-v1/; #include "mt7620a.dtsi" #include #include / { compatible = "ralink,mt7620a-mt7610e-evb", "ralink,mt7620a-soc"; model = "Ralink MT7620A evaluation board"; keys { compatible = "gpio-keys"; wps { label = "wps"; gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; linux,code = ; }; reset { label = "reset"; gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; linux,code = ; }; }; }; &gpio0 { status = "okay"; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <1000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x10000>; read-only; }; factory: partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; }; partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x50000 0x7b0000>; }; }; }; }; ðernet { pinctrl-names = "default"; pinctrl-0 = <&ephy_pins>; mediatek,portmap = "llllw"; }; &gsw { mediatek,port4 = "ephy"; }; &sdhci { status = "okay"; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { reg = <0x0000 0 0 0 0>; mediatek,mtd-eeprom = <&factory 0x8000>; ieee80211-freq-limit = <5000000 6000000>; }; }; '>openwrt-19.07 upstream openwrtJames
aboutsummaryrefslogtreecommitdiffstats
blob: 2c37c96961ebce62a90d3bb60352008fc4294a01 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
/dts-v1/;

#include "mt7621_elecom_wrc-gs.dtsi"

/ {
	compatible = "elecom,wrc-2533gst", "mediatek,mt7621-soc";
	model = "ELECOM WRC-2533GST";
};

&partitions {
	partition@50000 {
		compatible = "denx,uimage";
		label = "firmware";
		reg = <0x50000 0xb00000>;
	};

	partition@b50000 {
		label = "tm_pattern";
		reg = <0xb50000 0x380000>;
		read-only;
	};

	partition@ed0000 {
		label = "tm_key";
		reg = <0xed0000 0x80000>;
		read-only;
	};

	partition@f50000 {
		label = "art_block";
		reg = <0xf50000 0x30000>;
		read-only;
	};

	partition@f80000 {
		label = "user_data";
		reg = <0xf80000 0x80000>;
		read-only;
	};
};