#include "mt7620a.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "planex,mzk-ex300np", "ralink,mt7620a-soc";
	model = "Planex MZK-EX300NP";

	aliases {
		led-boot = &led_wps;
		led-failsafe = &led_wps;
		led-running = &led_wps;
		led-upgrade = &led_wps;
	};

	leds {
		compatible = "gpio-leds";

		wifi {
			label = "green:wifi";
			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
		};

		led_wps: wps {
			label = "green:wps";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		};

		rep {
			label = "blue:rep";
			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
		};

		wifi1 {
			label = "blue:wifi1";
			gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
		};

		wifi2 {
			label = "blue:wifi2";
			gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
		};

		wifi3 {
			label = "blue:wifi3";
			gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_RFKILL>;
		};
	};
};

&gpio1 {
	status = "okay";
};

&gpio3 {
	status = "okay";
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0x730000>;
			};

			partition@780000 {
				label = "Udata";
				reg = <0x780000 0x80000>;
			};
		};
	};
};

&state_default {
	gpio {
		groups = "i2c", "spi refclk", "rgmii1", "wled";
		function = "gpio";
	};
};

&ethernet {
	pinctrl-names = "default";
	pinctrl-0 = <&ephy_pins>;

	nvmem-cells = <&macaddr_factory_4>;
	nvmem-cell-names = "mac-address";

	mediatek,portmap = "llllw";
};

&wmac {
	ralink,mtd-eeprom = <&factory 0x0>;
};

&factory {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_factory_4: macaddr@4 {
		reg = <0x4 0x6>;
	};
};