// SPDX-License-Identifier: GPL-2.0-only #include "mt7620a.dtsi" #include #include / { compatible = "fon,fon2601", "ralink,mt7620a-soc"; model = "Fon FON2601"; aliases { led-boot = &led_power; led-failsafe = &led_power; led-running = &led_power; led-upgrade = &led_power; }; leds { compatible = "gpio-leds"; led_power: power_r { label = "red:power"; gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; }; internet_g { label = "green:internet"; gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; }; net_g { label = "green:net"; gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; }; wifi_g { label = "green:wifi"; gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; }; }; keys { compatible = "gpio-keys"; reset { label = "reset"; gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; linux,code = ; }; }; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x10000>; read-only; }; factory: partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; }; partition@50000 { compatible = "openwrt,uimage", "denx,uimage"; openwrt,padding = <32>; label = "firmware"; reg = <0x50000 0xf90000>; }; partition@fe0000 { label = "board_data"; reg = <0xfe0000 0x20000>; read-only; }; }; }; }; &state_default { gpio { groups = "i2c", "uartf"; function = "gpio"; }; nd_sd { groups = "nd_sd"; function = "sd"; }; spi_cs { groups = "spi refclk"; function = "spi refclk"; }; }; ðernet { pinctrl-names = "default"; pinctrl-0 = <&rgmii2_pins &mdio_pins>; nvmem-cells = <&macaddr_factory_4>; nvmem-cell-names = "mac-address"; port@4 { status = "okay"; phy-handle = <&phy4>; phy-mode = "rgmii"; }; mdio-bus { status = "okay"; phy4: ethernet-phy@4 { reg = <4>; phy-mode = "rgmii"; }; }; }; &gsw { mediatek,port4-gmac; mediatek,ephy-base = /bits/ 8 <8>; }; &wmac { ralink,mtd-eeprom = <&factory 0x0>; pinctrl-names = "default"; pinctrl-0 = <&pa_pins>, <&wled_pins>; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { compatible = "pci14c3,7662"; reg = <0x0000 0 0 0 0>; mediatek,mtd-eeprom = <&factory 0x8000>; ieee80211-freq-limit = <5000000 6000000>; }; }; &ehci { status = "okay"; }; &ohci { status = "okay"; }; &factory { compatible = "nvmem-cells"; #address-cells = <1>; #size-cells = <1>; macaddr_factory_4: macaddr@4 { reg = <0x4 0x6>; }; };