From 79f698655871f2eeceb1f9051e60d97bc434f52f Mon Sep 17 00:00:00 2001
From: Matthew McClintock <mmcclint@qca.qualcomm.com>
Date: Fri, 29 Apr 2016 12:48:02 -0500
Subject: [PATCH 30/37] qcom: ipq4019: use correct clock for i2c bus 0

For the record the mapping is as follows:

QUP0 = SPI QUP1
QUP1 = SPI QUP2
QUP2 = I2C QUP1
QUP3 = I2C QUP2

Signed-off-by: Matthew McClintock <mmcclint@qca.qualcomm.com>
---
 arch/arm/boot/dts/qcom-ipq4019.dtsi |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -175,7 +175,7 @@
 			reg = <0x78b7000 0x6000>;
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&gcc GCC_BLSP1_AHB_CLK>,
-				 <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+				 <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
 			clock-names = "iface", "core";
 			#address-cells = <1>;
 			#size-cells = <0>;