// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
// Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
// Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.

#include "qcom-ipq4019.dtsi"
#include <dt-bindings/soc/qcom,tcsr.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	model = "ZTE MF289F";
	compatible = "zte,mf289f";

	aliases {
		led-boot = &led_status;
		led-failsafe = &led_status;
		led-running = &led_status;
		led-upgrade = &led_status;
	};

	chosen {
		/*
		 * bootargs forced by u-boot bootipq command:
		 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
		 */
		bootargs-append = " root=/dev/ubiblock0_1";
	};

	/*
	 * This node is used to restart modem module to avoid anomalous
	 * behaviours on initial communication.
	 */
	gpio-restart {
		compatible = "gpio-restart";
		gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
	};

	leds {
		compatible = "gpio-leds";

		led_status: led-0 {
			label = "blue:power";
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
		};

		led-1 {
			function = LED_FUNCTION_WLAN;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};
	};

	keys {
		compatible = "gpio-keys";

		key-reset {
			label = "reset";
			linux,code = <KEY_RESTART>;
			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
		};

		key-wps {
			label = "wps";
			linux,code = <KEY_WPS_BUTTON>;
			gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
		};
	};

	soc {
		tcsr@1949000 {
			compatible = "qcom,tcsr";
			reg = <0x1949000 0x100>;
			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
		};

		tcsr@194b000 {
			/* select hostmode */
			compatible = "qcom,tcsr";
			reg = <0x194b000 0x100>;
			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
			status = "okay";
		};

		ess_tcsr@1953000 {
			compatible = "qcom,tcsr";
			reg = <0x1953000 0x1000>;
			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
		};

		tcsr@1957000 {
			compatible = "qcom,tcsr";
			reg = <0x1957000 0x100>;
			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
		};
	};
};

&prng {
	status = "okay";
};

&mdio {
	status = "okay";
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
	reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2000>;
};

&watchdog {
	status = "okay";
};

&blsp_dma {
	status = "okay";
};

&usb2 {
	status = "okay";
};

&usb3 {
	status = "okay";
};

&blsp1_spi1 {
	pinctrl-0 = <&spi_0_pins>;
	pinctrl-names = "default";
	status = "okay";
	cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
		   <&tlmm 54 GPIO_ACTIVE_HIGH>;

	flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:SBL1";
				reg = <0x0 0x40000>;
				read-only;
			};

			partition@40000 {
				label = "0:MIBIB";
				reg = <0x40000 0x20000>;
				read-only;
			};

			partition@60000 {
				label = "0:QSEE";
				reg = <0x60000 0x60000>;
				read-only;
			};

			partition@c0000 {
				label = "0:CDT";
				reg = <0xc0000 0x10000>;
				read-only;
			};

			partition@d0000 {
				label = "0:DDRPARAMS";
				reg = <0xd0000 0x10000>;
				read-only;
			};

			partition@e0000 {
				label = "0:APPSBLENV";
				reg = <0xe0000 0x10000>;
				read-only;
			};

			partition@f0000 {
				label = "0:APPSBL";
				reg = <0xf0000 0xc0000>;
				read-only;
			};

			partition@1b0000 {
				label = "0:reserved1";
				reg = <0x1b0000 0x50000>;
				read-only;
			};
		};
	};

	spi-nand@1 { /* flash@1 ? */
		compatible = "spi-nand";
		reg = <1>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "fota-flag";
				reg = <0x0 0xa0000>;
				read-only;
			};

			partition@a0000 {
				label = "ART";
				reg = <0xa0000 0x80000>;
				read-only;
				compatible = "nvmem-cells";
				#address-cells = <1>;
				#size-cells = <1>;

				precal_art_1000: precal@1000 {
					reg = <0x1000 0x2f20>;
				};

				precal_art_5000: precal@5000 {
					reg = <0x5000 0x2f20>;
				};
			};

			partition@120000 {
				label = "mac";
				reg = <0x120000 0x80000>;
				read-only;
				compatible = "nvmem-cells";
				#address-cells = <1>;
				#size-cells = <1>;

				macaddr_mac_0: macaddr@0 {
					reg = <0x0 0x6>;
				};
			};

			partition@1a0000 {
				label = "reserved2";
				reg = <0x1a0000 0xc0000>;
				read-only;
			};

			partition@260000 {
				label = "cfg-param";
				reg = <0x260000 0x400000>;
				read-only;
			};

			partition@660000 {
				label = "log";
				reg = <0x660000 0x400000>;
			};

			partition@a60000 {
				label = "oops";
				reg = <0xa60000 0xa0000>;
			};

			partition@b00000 {
				label = "reserved3";
				reg = <0xb00000 0x500000>;
				read-only;
			};

			partition@1000000 {
				label = "web";
				reg = <0x1000000 0x800000>;
			};

			partition@1800000 {
				label = "rootfs";
				reg = <0x1800000 0x1d00000>;
			};

			partition@3500000 {
				label = "data";
				reg = <0x3500000 0x1900000>;
			};

			partition@4e00000 {
				label = "fota";
				reg = <0x4e00000 0x3200000>;
			};
		};
	};
};

&blsp1_uart1 {
	pinctrl-0 = <&serial_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&crypto {
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&gmac {
	status = "okay";
	nvmem-cell-names = "mac-address";
	nvmem-cells = <&macaddr_mac_0>;
};

&switch {
	status = "okay";
};

&swport2 {
	status = "okay";

	label = "wan";

	nvmem-cell-names = "mac-address";
	nvmem-cells = <&macaddr_mac_0>;
	mac-address-increment = <1>;
};

&swport5 {
	status = "okay";

	label = "lan";
};

&qpic_bam {
	status = "okay";
};

&tlmm {
	i2c_0_pins: i2c_0_pinmux {
		mux {
			pins = "gpio20", "gpio21";
			function = "blsp_i2c0";
			bias-disable;
		};
	};

	mdio_pins: mdio_pinmux {
		mux_1 {
			pins = "gpio6";
			function = "mdio";
			bias-pull-up;
		};

		mux_2 {
			pins = "gpio7";
			function = "mdc";
			bias-pull-up;
		};
	};

	serial_pins: serial_pinmux {
		mux {
			pins = "gpio16", "gpio17";
			function = "blsp_uart0";
			bias-disable;
		};
	};

	spi_0_pins: spi_0_pinmux {
		pinmux {
			function = "blsp_spi0";
			pins = "gpio13", "gpio14", "gpio15";
			drive-strength = <12>;
			bias-disable;
		};

		pinmux_cs {
			function = "gpio";
			pins = "gpio12", "gpio54";
			drive-strength = <2>;
			bias-disable;
			output-high;
		};
	};
};

&usb2_hs_phy {
	status = "okay";
};

&usb3_ss_phy {
	status = "okay";
};

&usb3_hs_phy {
	status = "okay";
};

&wifi0 {
	status = "okay";
	nvmem-cell-names = "pre-calibration", "mac-address";
	nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0>;
	mac-address-increment = <2>;
	qcom,ath10k-calibration-variant = "zte,mf289f";
};

/* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */
&wifi1 {
	status = "okay";
	nvmem-cell-names = "pre-calibration", "mac-address";
	nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0>;
	mac-address-increment = <3>;
	qcom,ath10k-calibration-variant = "zte,mf289f";
};

/* This node is used only on AT1 version for 5Ghz on QCA9984 */
&pcie0 {
	status = "okay";
	perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
	wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
	clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;

	bridge@0,0 {
		reg = <0x00000000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;
		ranges;

		wifi2: wifi@1,0 {
			nvmem-cell-names = "mac-address";
			nvmem-cells = <&macaddr_mac_0>;
			mac-address-increment = <4>;
			compatible = "qcom,ath10k";
			reg = <0x00010000 0 0 0 0>;
			qcom,ath10k-calibration-variant = "zte,mf289f";
		};
	};
};