// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qcom-ipq4019-ap.dk01.1.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	aliases {
		label-mac-device = &gmac0;
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x10000000>;
	};

	soc {
		pinctrl@1000000 {
			mdio_pins: mdio_pinmux {
				mux_1 {
					pins = "gpio53";
					function = "mdio";
					bias-pull-up;
				};
				mux_2 {
					pins = "gpio52";
					function = "mdc";
					bias-pull-up;
				};
			};

			i2c_0_pins: i2c_0_pinmux {
				mux {
					pins = "gpio58", "gpio59";
					function = "blsp_i2c0";
					bias-disable;
				};
			};
		};

		keys {
			compatible = "gpio-keys";

			reset {
				label = "reset";
				gpios = <&tlmm 4 1>;
				linux,code = <KEY_RESTART>;
			};
		};

		gpio_export {
			compatible = "gpio-export";
			#size-cells = <0>;

			gpio_out {
				gpio-export,name = "gpio_out";
				gpio-export,output = <0>;
				gpio-export,direction_may_change = <0>;
				gpios = <&stm32_io 23 GPIO_ACTIVE_HIGH>;
			};

			gpio_in {
				gpio-export,name = "gpio_in";
				gpio-export,input = <0>;
				gpio-export,direction_may_change = <0>;
				gpios = <&stm32_io 24 GPIO_ACTIVE_LOW>;
			};
		};
	};
};

&blsp1_i2c3 {
	status = "okay";
	pinctrl-0 = <&i2c_0_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	stm32_io: stm32@74 {
		compatible = "tlt,stm32v1";
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
		gpio-controller;
		interrupt-controller;
		interrupt-parent = <&tlmm>;
		interrupts = <5 2>;
		reg = <0x74>;
	};
};

&blsp1_spi1 {
	cs-gpios = <&tlmm 54 0>, <&tlmm 63 0>;
	num-cs = <2>;

	xt25f128b@0 {
		/*
		 * Factory U-boot looks in 0:BOOTCONFIG partition for active
		 * partitions settings and mangles the partition config so
		 * 0:QSEE/0:QSEE_1, 0:CDT/0:CDT_1 and  0:APPSBL/0:APPSBL_1 pairs
		 * can be swaped. It isn't a problem but we never can be sure where
		 * OFW put factory images. "n25q128a11" is required for proper nor
		 * recognition in u-boot.
		 */
		compatible = "jedec,spi-nor", "n25q128a11";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:SBL1";
				reg = <0x0 0x40000>;
				read-only;
			};

			partition@40000 {
				label = "0:MIBIB";
				reg = <0x40000 0x20000>;
				read-only;
			};

			partition@60000 {
				label = "0:BOOTCONFIG";
				reg = <0x60000 0x20000>;
				read-only;
			};

			partition@80000 {
				label = "0:BOOTCONFIG1";
				reg = <0x80000 0x20000>;
				read-only;
			};

			partition@a0000 {
				label = "0:QSEE";
				reg = <0xa0000 0x60000>;
				read-only;
			};

			partition@100000 {
				label = "0:QSEE_1";
				reg = <0x100000 0x60000>;
				read-only;
			};

			partition@160000 {
				label = "0:CDT";
				reg = <0x160000 0x10000>;
				read-only;
			};

			partition@170000 {
				label = "0:CDT_1";
				reg = <0x170000 0x10000>;
				read-only;
			};

			partition@180000 {
				label = "0:DDRPARAMS";
				reg = <0x180000 0x10000>;
				read-only;
			};

			partition@190000 {
				label = "0:APPSBLENV";
				reg = <0x190000 0x10000>;
				read-only;
			};

			partition@1a0000 {
				label = "0:APPSBL";
				reg = <0x1a0000 0xa0000>;
				read-only;
			};

			partition@240000 {
				label = "0:APPSBL_1";
				reg = <0x240000 0xa0000>;
				read-only;
			};

			partition@2e0000 {
				label = "0:ART";
				reg = <0x2e0000 0x10000>;
				read-only;
				compatible = "nvmem-cells";
				#address-cells = <1>;
				#size-cells = <1>;

				precal_art_1000: precal@1000 {
					reg = <0x1000 0x2f20>;
				};

				precal_art_5000: precal@5000 {
					reg = <0x5000 0x2f20>;
				};
			};

			config: partition@2f0000 {
				label = "0:CONFIG";
				reg = <0x2f0000 0x10000>;
				read-only;
				compatible = "nvmem-cells";
				#address-cells = <1>;
				#size-cells = <1>;

				macaddr_config_0: macaddr@0 {
					reg = <0x0 0x6>;
				};
			};

			partition@300000 {
				label = "0:CONFIG_RW";
				reg = <0x300000 0x10000>;
				read-only;
			};

			partition@310000 {
				label = "0:EVENTSLOG";
				reg = <0x310000 0x90000>;
				read-only;
			};
		};
	};

	xt26g02a@1 {
		/*
		 * Factory U-boot looks in 0:BOOTCONFIG partition for active
		 * partitions settings and mangles the partition config so
		 * rootfs/rootfs_1 pairs can be swaped.
		 * It isn't a problem but we never can be sure where OFW put
		 * factory images. "spinand,mt29f" value is required for proper
		 * nand recognition in u-boot.
		 */
		compatible = "spi-nand", "spinand,mt29f";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <1>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "rootfs_1";
				reg = <0x00000000 0x08000000>;
			};

			partition@8000000 {
				label = "rootfs";
				reg = <0x08000000 0x08000000>;
			};
		};
	};
};

&mdio {
	status = "okay";
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
	phy-reset-gpio = <&tlmm 62 0>;
};

&wifi0 {
	nvmem-cell-names = "pre-calibration", "mac-address";
	nvmem-cells = <&precal_art_1000>, <&macaddr_config_0>;
	mac-address-increment = <2>;
};

&wifi1 {
	nvmem-cell-names = "pre-calibration", "mac-address";
	nvmem-cells = <&precal_art_5000>, <&macaddr_config_0>;
	mac-address-increment = <3>;
};