From ace6abaa0f9203083fe4c0a6a74da2d96410b625 Mon Sep 17 00:00:00 2001 From: Alexander Couzens Date: Sat, 13 Aug 2022 12:49:33 +0200 Subject: [PATCH 01/10] net: phy: realtek: rtl8221: allow to configure SERDES mode The rtl8221 supports multiple SERDES modes: - SGMII - 2500base-x - HiSGMII Further it supports rate adaption on SERDES links to allow slow ethernet speeds (10/100/1000mbit) to work on 2500base-x/HiSGMII links without reducing the SERDES speed. When operating without rate adapters the SERDES link will follow the ethernet speed. Signed-off-by: Alexander Couzens --- drivers/net/phy/realtek.c | 48 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -53,6 +53,15 @@ RTL8201F_ISR_LINK) #define RTL8201F_IER 0x13 +#define RTL8221B_MMD_SERDES_CTRL MDIO_MMD_VEND1 +#define RTL8221B_MMD_PHY_CTRL MDIO_MMD_VEND2 +#define RTL8221B_SERDES_OPTION 0x697a +#define RTL8221B_SERDES_OPTION_MODE_MASK GENMASK(5, 0) +#define RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII 0 +#define RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII 1 +#define RTL8221B_SERDES_OPTION_MODE_2500BASEX 2 +#define RTL8221B_SERDES_OPTION_MODE_HISGMII 3 + #define RTL8366RB_POWER_SAVE 0x15 #define RTL8366RB_POWER_SAVE_ON BIT(12) @@ -841,6 +850,48 @@ static irqreturn_t rtl9000a_handle_inter return IRQ_HANDLED; } +static int rtl8221b_config_init(struct phy_device *phydev) +{ + u16 option_mode; + + switch (phydev->interface) { + case PHY_INTERFACE_MODE_2500BASEX: + if (!phydev->is_c45) { + option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX; + break; + } + fallthrough; + case PHY_INTERFACE_MODE_SGMII: + option_mode = RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII; + break; + default: + return 0; + } + + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, + 0x75f3, 0); + + phy_modify_mmd_changed(phydev, RTL8221B_MMD_SERDES_CTRL, + RTL8221B_SERDES_OPTION, + RTL8221B_SERDES_OPTION_MODE_MASK, option_mode); + switch (option_mode) { + case RTL8221B_SERDES_OPTION_MODE_2500BASEX_SGMII: + case RTL8221B_SERDES_OPTION_MODE_2500BASEX: + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd455); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); + break; + case RTL8221B_SERDES_OPTION_MODE_HISGMII_SGMII: + case RTL8221B_SERDES_OPTION_MODE_HISGMII: + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6a04, 0x0503); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f10, 0xd433); + phy_write_mmd(phydev, RTL8221B_MMD_SERDES_CTRL, 0x6f11, 0x8020); + break; + } + + return 0; +} + static struct phy_driver realtek_drvs[] = { { PHY_ID_MATCH_EXACT(0x00008201), @@ -981,6 +1032,7 @@ static struct phy_driver realtek_drvs[] PHY_ID_MATCH_EXACT(0x001cc849), .name = "RTL8221B-VB-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, + .config_init = rtl8221b_config_init, .config_aneg = rtl822x_config_aneg, .read_status = rtl822x_read_status, .suspend = genphy_suspend, @@ -992,6 +1044,7 @@ static struct phy_driver realtek_drvs[] .name = "RTL8221B-VM-CG 2.5Gbps PHY", .get_features = rtl822x_get_features, .config_aneg = rtl822x_config_aneg, + .config_init = rtl8221b_config_init, .read_status = rtl822x_read_status, .suspend = genphy_suspend, .resume = rtlgen_resume,