From 245224608b5368c10407da07557e546743d3c489 Mon Sep 17 00:00:00 2001 From: Nick Hainke Date: Mon, 27 Dec 2021 09:33:13 +0100 Subject: [PATCH 2/2] mtd: spi-nor: disable 16-bit-sr for macronix Macronix flash chips seem to consist of only one status register. These chips will not work with the "16-bit Write Status (01h) Command". Disable SNOR_F_HAS_16BIT_SR for all Macronix chips. Tested with MX25L6405D. Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()") Signed-off-by: David Bauer Signed-off-by: Nick Hainke --- drivers/mtd/spi-nor/macronix.c | 1 + 1 file changed, 1 insertion(+) --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c @@ -94,6 +94,7 @@ static void macronix_default_init(struct { nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode; + nor->flags &= ~SNOR_F_HAS_16BIT_SR; nor->flags |= SNOR_F_HAS_LOCK; }