From fdbf35df9c091db9c46e57e9938e3f7a4f603a7c Mon Sep 17 00:00:00 2001 From: Ansuel Smith Date: Thu, 14 Oct 2021 00:39:07 +0200 Subject: dt-bindings: net: dsa: qca8k: Add SGMII clock phase properties Add names and descriptions of additional PORT0_PAD_CTRL properties. qca,sgmii-(rx|tx)clk-falling-edge are for setting the respective clock phase to failling edge. Co-developed-by: Matthew Hagan Signed-off-by: Matthew Hagan Signed-off-by: Ansuel Smith Signed-off-by: David S. Miller --- Documentation/devicetree/bindings/net/dsa/qca8k.txt | 4 ++++ 1 file changed, 4 insertions(+) --- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt +++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt @@ -37,6 +37,10 @@ A CPU port node has the following option managed entity. See Documentation/devicetree/bindings/net/fixed-link.txt for details. +- qca,sgmii-rxclk-falling-edge: Set the receive clock phase to falling edge. + Mostly used in qca8327 with CPU port 0 set to + sgmii. +- qca,sgmii-txclk-falling-edge: Set the transmit clock phase to falling edge. For QCA8K the 'fixed-link' sub-node supports only the following properties: