From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Sun, 8 Dec 2013 14:17:50 +0100 Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals --- arch/mips/bcm63xx/reset.c | 39 ++++++++++++++-------- arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++ arch/mips/pci/pci-bcm63xx.c | 7 ++++ 3 files changed, 34 insertions(+), 14 deletions(-) --- a/arch/mips/bcm63xx/reset.c +++ b/arch/mips/bcm63xx/reset.c @@ -28,7 +28,9 @@ [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \ [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \ [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \ - [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, + [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \ + [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \ + [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD, #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK @@ -42,6 +44,8 @@ #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK #define BCM3368_RESET_PCIE 0 #define BCM3368_RESET_PCIE_EXT 0 +#define BCM3368_RESET_PCIE_CORE 0 +#define BCM3368_RESET_PCIE_HARD 0 #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK @@ -54,11 +58,10 @@ #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK #define BCM6318_RESET_PCM 0 #define BCM6318_RESET_MPI 0 -#define BCM6318_RESET_PCIE \ - (SOFTRESET_6318_PCIE_MASK | \ - SOFTRESET_6318_PCIE_CORE_MASK | \ - SOFTRESET_6318_PCIE_HARD_MASK) +#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK +#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK +#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK #define BCM6328_RESET_ENET 0 @@ -70,11 +73,10 @@ #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK #define BCM6328_RESET_MPI 0 -#define BCM6328_RESET_PCIE \ - (SOFTRESET_6328_PCIE_MASK | \ - SOFTRESET_6328_PCIE_CORE_MASK | \ - SOFTRESET_6328_PCIE_HARD_MASK) +#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK +#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK +#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK @@ -88,6 +90,8 @@ #define BCM6338_RESET_MPI 0 #define BCM6338_RESET_PCIE 0 #define BCM6338_RESET_PCIE_EXT 0 +#define BCM6338_RESET_PCIE_CORE 0 +#define BCM6338_RESET_PCIE_HARD 0 #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK @@ -101,6 +105,8 @@ #define BCM6348_RESET_MPI 0 #define BCM6348_RESET_PCIE 0 #define BCM6348_RESET_PCIE_EXT 0 +#define BCM6348_RESET_PCIE_CORE 0 +#define BCM6348_RESET_PCIE_HARD 0 #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK @@ -114,6 +120,8 @@ #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK #define BCM6358_RESET_PCIE 0 #define BCM6358_RESET_PCIE_EXT 0 +#define BCM6358_RESET_PCIE_CORE 0 +#define BCM6358_RESET_PCIE_HARD 0 #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK #define BCM6362_RESET_ENET 0 @@ -125,9 +133,10 @@ #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK #define BCM6362_RESET_MPI 0 -#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \ - SOFTRESET_6362_PCIE_CORE_MASK) +#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK +#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK +#define BCM6362_RESET_PCIE_HARD 0 #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK #define BCM6368_RESET_ENET 0 @@ -141,6 +150,8 @@ #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK #define BCM6368_RESET_PCIE 0 #define BCM6368_RESET_PCIE_EXT 0 +#define BCM6368_RESET_PCIE_CORE 0 +#define BCM6368_RESET_PCIE_HARD 0 #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK #define BCM63268_RESET_ENET 0 @@ -152,10 +163,10 @@ #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK #define BCM63268_RESET_MPI 0 -#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \ - SOFTRESET_63268_PCIE_CORE_MASK | \ - SOFTRESET_63268_PCIE_HARD_MASK) +#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK +#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK +#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK /* * core reset bits --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h @@ -14,6 +14,8 @@ enum bcm63xx_core_reset { BCM63XX_RESET_MPI, BCM63XX_RESET_PCIE, BCM63XX_RESET_PCIE_EXT, + BCM63XX_RESET_PCIE_CORE, + BCM63XX_RESET_PCIE_HARD, }; void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset); --- a/arch/mips/pci/pci-bcm63xx.c +++ b/arch/mips/pci/pci-bcm63xx.c @@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo /* reset the PCIe core */ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1); + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1); bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1); + if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) { + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1); + mdelay(10); + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0); + } mdelay(10); + bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0); bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0); mdelay(10); '#n63'>63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_AUDIT=y
CONFIG_AUDIT_GENERIC=y
CONFIG_BCM63XX=y
CONFIG_BCM63XX_CPU_6328=y
CONFIG_BCM63XX_CPU_6338=y
CONFIG_BCM63XX_CPU_6345=y
CONFIG_BCM63XX_CPU_6348=y
CONFIG_BCM63XX_CPU_6358=y
CONFIG_BCM63XX_CPU_6362=y
CONFIG_BCM63XX_CPU_6368=y
CONFIG_BCM63XX_ENET=y
CONFIG_BCM63XX_PHY=y
CONFIG_BCM63XX_WDT=y
CONFIG_BOARD_BCM963XX=y
# CONFIG_BOARD_LIVEBOX is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRAMFS=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_WORK=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_BCM63XX=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP_PIMSM_V1=y
CONFIG_IP_PIMSM_V2=y
CONFIG_IRQ_CPU=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_KEXEC=y
CONFIG_LEDS_GPIO=y
CONFIG_M25PXX_USE_FAST_READ=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MIPS=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MACHINE is not set
CONFIG_MIPS_MT_DISABLED=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_BCM63XX_PARTS=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_BE_BYTE_SWAP=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_NOSWAP is not set
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCI=y
# CONFIG_PCIEAER is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
# CONFIG_PREEMPT_RCU is not set
CONFIG_RELAY=y
CONFIG_RTL8366_SMI=y
CONFIG_RTL8367_PHY=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_BCM63XX=y
CONFIG_SERIAL_BCM63XX_CONSOLE=y
CONFIG_SPI=y
# CONFIG_SPI_BCM63XX is not set
CONFIG_SPI_BCM63XX_HSSPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SQUASHFS_EMBEDDED=y
CONFIG_SSB=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_BLOCKIO=y
# CONFIG_SSB_DRIVER_MIPS is not set
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_SPROM=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWCONFIG=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_USB_ARCH_HAS_XHCI=y
# CONFIG_USB_HCD_SSB is not set
CONFIG_USB_SUPPORT=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_ZONE_DMA_FLAG=0