From e5cefebc24b7684f4f84a539259612c8f5a4975b Mon Sep 17 00:00:00 2001 From: Stefan Wahren Date: Thu, 2 May 2019 23:42:29 +0200 Subject: [PATCH 611/806] HACK: clk-bcm2835: Add BCM2838_CLOCK_EMMC2 support The new BCM2838 supports an additional emmc2 clock. So add a new compatible to register this clock only for BCM2838. Signed-off-by: Stefan Wahren --- drivers/clk/bcm/clk-bcm2835.c | 20 ++++++++++++++++++-- include/dt-bindings/clock/bcm2835.h | 2 ++ 2 files changed, 20 insertions(+), 2 deletions(-) --- a/drivers/clk/bcm/clk-bcm2835.c +++ b/drivers/clk/bcm/clk-bcm2835.c @@ -124,6 +124,8 @@ #define CM_AVEODIV 0x1bc #define CM_EMMCCTL 0x1c0 #define CM_EMMCDIV 0x1c4 +#define CM_EMMC2CTL 0x1d0 +#define CM_EMMC2DIV 0x1d4 /* General bits for the CM_*CTL regs */ # define CM_ENABLE BIT(4) @@ -2047,6 +2049,15 @@ static const struct bcm2835_clk_desc clk .frac_bits = 8, .tcnt_mux = 39), + /* EMMC2 clock (only available for BCM2838) */ + [BCM2838_CLOCK_EMMC2] = REGISTER_PER_CLK( + .name = "emmc2", + .ctl_reg = CM_EMMC2CTL, + .div_reg = CM_EMMC2DIV, + .int_bits = 4, + .frac_bits = 8, + .tcnt_mux = 42), + /* General purpose (GPIO) clocks */ [BCM2835_CLOCK_GP0] = REGISTER_PER_CLK( .name = "gp0", @@ -2276,8 +2287,12 @@ static int bcm2835_clk_probe(struct plat for (i = 0; i < asize; i++) { desc = &clk_desc_array[i]; - if (desc->clk_register && desc->data) - hws[i] = desc->clk_register(cprman, desc->data); + if (desc->clk_register && desc->data) { + if ((i != BCM2838_CLOCK_EMMC2) || + of_device_is_compatible(fw_node, "brcm,bcm2838-cprman")) { + hws[i] = desc->clk_register(cprman, desc->data); + } + } } ret = bcm2835_mark_sdc_parent_critical(hws[BCM2835_CLOCK_SDRAM]->clk); @@ -2297,6 +2312,7 @@ static int bcm2835_clk_probe(struct plat static const struct of_device_id bcm2835_clk_of_match[] = { { .compatible = "brcm,bcm2835-cprman", }, + { .compatible = "brcm,bcm2838-cprman", }, {} }; MODULE_DEVICE_TABLE(of, bcm2835_clk_of_match); --- a/include/dt-bindings/clock/bcm2835.h +++ b/include/dt-bindings/clock/bcm2835.h @@ -66,3 +66,5 @@ #define BCM2835_CLOCK_DSI1E 48 #define BCM2835_CLOCK_DSI0P 49 #define BCM2835_CLOCK_DSI1P 50 + +#define BCM2838_CLOCK_EMMC2 51