// SPDX-License-Identifier: GPL-2.0-or-later /dts-v1/; #include #include #include #include #include #include / { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6362"; aliases { nflash = &nflash; pinctrl = &pinctrl; serial0 = &uart0; serial1 = &uart1; spi0 = &lsspi; spi1 = &hsspi; }; chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; }; clocks { periph_osc: periph-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; clock-output-names = "periph"; }; hsspi_osc: hsspi-osc { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <400000000>; clock-output-names = "hsspi_osc"; }; }; cpus { #address-cells = <1>; #size-cells = <0>; mips-hpt-frequency = <200000000>; cpu@0 { compatible = "brcm,bmips4350", "mips,mips4Kc"; device_type = "cpu"; reg = <0>; }; cpu@1 { compatible = "brcm,bmips4350", "mips,mips4Kc"; device_type = "cpu"; reg = <1>; }; }; cpu_intc: interrupt-controller { #address-cells = <0>; compatible = "mti,cpu-interrupt-controller"; interrupt-controller; #interrupt-cells = <1>; }; memory@0 { device_type = "memory"; reg = <0 0>; }; ubus { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges; periph_clk: clock-controller@10000004 { compatible = "brcm,bcm6362-clocks"; reg = <0x10000004 0x4>; #clock-cells = <1>; }; pll_cntl: syscon@10000008 { compatible = "syscon", "simple-mfd"; reg = <0x10000008 0x4>; native-endian; syscon-reboot { compatible = "syscon-reboot"; offset = <0x0>; mask = <0x1>; }; }; periph_rst: reset-controller@10000010 { compatible = "brcm,bcm6345-reset"; reg = <0x10000010 0x4>; #reset-cells = <1>; }; ext_intc: interrupt-controller@10000018 { #address-cells = <1>; compatible = "brcm,bcm6345-ext-intc"; reg = <0x10000018 0x4>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&periph_intc>; interrupts = , , , ; }; periph_intc: interrupt-controller@10000020 { #address-cells = <1>; compatible = "brcm,bcm6345-l1-intc"; reg = <0x10000020 0x10>, <0x10000030 0x10>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&cpu_intc>; interrupts = <2>, <3>; }; wdt: watchdog@1000005c { compatible = "brcm,bcm7038-wdt"; reg = <0x1000005c 0xc>; clocks = <&periph_osc>; timeout-sec = <30>; }; gpio_cntl: syscon@10000080 { #address-cells = <1>; #size-cells = <1>; compatible = "brcm,bcm6362-gpio-sysctl", "syscon", "simple-mfd"; reg = <0x10000080 0x80>; ranges = <0 0x10000080 0x80>; native-endian; gpio: gpio@0 { compatible = "brcm,bcm6362-gpio"; reg-names = "dirout", "dat"; reg = <0x0 0x8>, <0x8 0x8>; gpio-controller; gpio-ranges = <&pinctrl 0 0 48>; #gpio-cells = <2>; }; pinctrl: pinctrl@18 { compatible = "brcm,bcm6362-pinctrl"; reg = <0x18 0x10>, <0x38 0x4>; pinctrl_usb_device_led: usb_device_led-pins { function = "usb_device_led"; pins = "gpio0"; }; pinctrl_sys_irq: sys_irq-pins { function = "sys_irq"; pins = "gpio1"; }; pinctrl_serial_led: serial_led-pins { pinctrl_serial_led_clk: serial_led_clk-pins { function = "serial_led_clk"; pins = "gpio2"; }; pinctrl_serial_led_data: serial_led_data-pins { function = "serial_led_data"; pins = "gpio3"; }; }; pinctrl_robosw_led_data: robosw_led_data-pins { function = "robosw_led_data"; pins = "gpio4"; }; pinctrl_robosw_led_clk: robosw_led_clk-pins { function = "robosw_led_clk"; pins = "gpio5"; }; pinctrl_robosw_led0: robosw_led0-pins { function = "robosw_led0"; pins = "gpio6"; }; pinctrl_robosw_led1: robosw_led1-pins { function = "robosw_led1"; pins = "gpio7"; }; pinctrl_inet_led: inet_led-pins { function = "inet_led"; pins = "gpio8"; }; pinctrl_spi_cs2: spi_cs2-pins { function = "spi_cs2"; pins = "gpio9"; }; pinctrl_spi_cs3: spi_cs3-pins { function = "spi_cs3"; pins = "gpio10"; }; pinctrl_ntr_pulse: ntr_pulse-pins { function = "ntr_pulse"; pins = "gpio11"; }; pinctrl_uart1_scts: uart1_scts-pins { function = "uart1_scts"; pins = "gpio12"; }; pinctrl_uart1_srts: uart1_srts-pins { function = "uart1_srts"; pins = "gpio13"; }; pinctrl_uart1: uart1-pins { pinctrl_uart1_sdin: uart1_sdin-pins { function = "uart1_sdin"; pins = "gpio14"; }; pinctrl_uart1_sdout: uart1_sdout-pins { function = "uart1_sdout"; pins = "gpio15"; }; }; pinctrl_adsl_spi: adsl_spi-pins { pinctrl_adsl_spi_miso: adsl_spi_miso-pins { function = "adsl_spi_miso"; pins = "gpio16"; }; pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { function = "adsl_spi_mosi"; pins = "gpio17"; }; pinctrl_adsl_spi_clk: adsl_spi_clk-pins { function = "adsl_spi_clk"; pins = "gpio18"; }; pinctrl_adsl_spi_cs: adsl_spi_cs-pins { function = "adsl_spi_cs"; pins = "gpio19"; }; }; pinctrl_ephy0_led: ephy0_led-pins { function = "ephy0_led"; pins = "gpio20"; }; pinctrl_ephy1_led: ephy1_led-pins { function = "ephy1_led"; pins = "gpio21"; }; pinctrl_ephy2_led: ephy2_led-pins { function = "ephy2_led"; pins = "gpio22"; }; pinctrl_ephy3_led: ephy3_led-pins { function = "ephy3_led"; pins = "gpio23"; }; pinctrl_ext_irq0: ext_irq0-pins { function = "ext_irq0"; pins = "gpio24"; }; pinctrl_ext_irq1: ext_irq1-pins { function = "ext_irq1"; pins = "gpio25"; }; pinctrl_ext_irq2: ext_irq2-pins { function = "ext_irq2"; pins = "gpio26"; }; pinctrl_ext_irq3: ext_irq3-pins { function = "ext_irq3"; pins = "gpio27"; }; pinctrl_nand: nand-pins { function = "nand"; group = "nand_grp"; }; }; }; uart0: serial@10000100 { compatible = "brcm,bcm6345-uart"; reg = <0x10000100 0x18>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_osc>; clock-names = "periph"; status = "disabled"; }; uart1: serial@10000120 { compatible = "brcm,bcm6345-uart"; reg = <0x10000120 0x18>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_osc>; clock-names = "periph"; status = "disabled"; }; nflash: nand@10000200 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,nand-bcm6368", "brcm,brcmnand-v2.2", "brcm,brcmnand"; reg = <0x10000200 0x180>, <0x10000600 0x200>, <0x10000070 0x10>; reg-names = "nand", "nand-cache", "nand-int-base"; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_clk BCM6362_CLK_NAND>; clock-names = "nand"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; status = "disabled"; }; lsspi: spi@10000800 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6358-spi"; reg = <0x10000800 0x70c>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_clk BCM6362_CLK_SPI>; clock-names = "spi"; resets = <&periph_rst BCM6362_RST_SPI>; status = "disabled"; }; hsspi: spi@10001000 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6328-hsspi"; reg = <0x10001000 0x600>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_clk BCM6362_CLK_HSSPI>, <&hsspi_osc>; clock-names = "hsspi", "pll"; resets = <&periph_rst BCM6362_RST_SPI>; status = "disabled"; }; serdes_cntl: syscon@10001804 { compatible = "syscon"; reg = <0x10001804 0x4>; native-endian; }; periph_pwr: power-controller@10001848 { compatible = "brcm,bcm6362-power-controller"; reg = <0x10001848 0x4>; #power-domain-cells = <1>; }; leds: led-controller@10001900 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6328-leds"; reg = <0x10001900 0x24>; status = "disabled"; }; ehci: usb@10002500 { compatible = "brcm,bcm6362-ehci", "generic-ehci"; reg = <0x10002500 0x100>; big-endian; spurious-oc; interrupt-parent = <&periph_intc>; interrupts = ; phys = <&usbh 0>; phy-names = "usb"; status = "disabled"; }; ohci: usb@10002600 { compatible = "brcm,bcm6362-ohci", "generic-ohci"; reg = <0x10002600 0x100>; big-endian; no-big-frame-no; interrupt-parent = <&periph_intc>; interrupts = ; phys = <&usbh 0>; phy-names = "usb"; status = "disabled"; }; usbh: usb-phy@10002700 { compatible = "brcm,bcm6362-usbh-phy"; reg = <0x10002700 0x38>; #phy-cells = <1>; clocks = <&periph_clk BCM6362_CLK_USBH>; clock-names = "usbh"; power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>; resets = <&periph_rst BCM6362_RST_USBH>; status = "disabled"; }; ethernet: ethernet@1000d800 { compatible = "brcm,bcm6362-enetsw"; reg = <0x1000d800 0x80>, <0x1000da00 0x80>, <0x1000dc00 0x80>; reg-names = "dma", "dma-channels", "dma-sram"; interrupt-parent = <&periph_intc>; interrupts = ; interrupt-names = "rx"; clocks = <&periph_clk BCM6362_CLK_SWPKT_USB>, <&periph_clk BCM6362_CLK_SWPKT_SAR>, <&periph_clk BCM6362_CLK_ROBOSW>; resets = <&periph_rst BCM6362_RST_ENETSW>, <&periph_rst BCM6362_RST_EPHY>; power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_ROBOSW>, <&periph_pwr BCM6362_POWER_DOMAIN_GMII_PADS>; dma-rx = <0>; dma-tx = <1>; status = "disabled"; }; switch0: switch@10e00000 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6362-switch"; reg = <0x10e00000 0x8000>; big-endian; ports { #address-cells = <1>; #size-cells = <0>; port@8 { reg = <8>; phy-mode = "internal"; ethernet = <ðernet>; fixed-link { speed = <1000>; full-duplex; }; }; }; }; mdio: mdio@10e000b0 { #address-cells = <1>; #size-cells = <0>; compatible = "brcm,bcm6368-mdio-mux"; reg = <0x10e000b0 0x8>; mdio_int: mdio@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; phy1: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; }; phy2: ethernet-phy@2 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <2>; }; phy3: ethernet-phy@3 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <3>; }; phy4: ethernet-phy@4 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <4>; }; }; mdio_ext: mdio@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; }; }; pcie: pcie@10e40000 { compatible = "brcm,bcm6328-pcie"; reg = <0x10e40000 0x10000>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; bus-range = <0x00 0x01>; ranges = <0x2000000 0 0x10f00000 0x10f00000 0 0x100000>; linux,pci-probe-only = <1>; interrupt-parent = <&periph_intc>; interrupts = ; clocks = <&periph_clk BCM6362_CLK_PCIE>; clock-names = "pcie"; resets = <&periph_rst BCM6362_RST_PCIE>, <&periph_rst BCM6362_RST_PCIE_EXT>, <&periph_rst BCM6362_RST_PCIE_CORE>; reset-names = "pcie", "pcie-ext", "pcie-core"; power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_PCIE>; brcm,serdes = <&serdes_cntl>; status = "disabled"; }; }; };