From d3cbabced959831fb1f04565dd424ece48f1b831 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Thu, 31 Mar 2022 15:33:59 +0100 Subject: [PATCH] media: i2c: imx258: Allow configuration of clock lane behaviour The sensor supports the clock lane either remaining in HS mode during frame blanking, or dropping to LP11. Add configuration of the mode via V4L2_MBUS_CSI2_CONTINUOUS_CLOCK. Signed-off-by: Dave Stevenson --- drivers/media/i2c/imx258.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) --- a/drivers/media/i2c/imx258.c +++ b/drivers/media/i2c/imx258.c @@ -72,6 +72,8 @@ /* Test Pattern Control */ #define IMX258_REG_TEST_PATTERN 0x0600 +#define IMX258_CLK_BLANK_STOP 0x4040 + /* Orientation */ #define REG_MIRROR_FLIP_CONTROL 0x0101 #define REG_CONFIG_MIRROR_HFLIP 0x01 @@ -848,6 +850,7 @@ struct imx258 { const struct imx258_link_freq_config *link_freq_configs; const s64 *link_freq_menu_items; unsigned int nlanes; + unsigned int csi2_flags; /* * Mutex for serialized access: @@ -1300,6 +1303,15 @@ static int imx258_start_streaming(struct return ret; } + ret = imx258_write_reg(imx258, IMX258_CLK_BLANK_STOP, + IMX258_REG_VALUE_08BIT, + imx258->csi2_flags & V4L2_MBUS_CSI2_CONTINUOUS_CLOCK ? + 0 : 1); + if (ret) { + dev_err(&client->dev, "%s failed to set clock lane mode\n", __func__); + return ret; + } + /* Apply default values of current mode */ reg_list = &imx258->cur_mode->reg_list; ret = imx258_write_regs(imx258, reg_list->regs, reg_list->num_of_regs); @@ -1703,6 +1715,8 @@ static int imx258_probe(struct i2c_clien goto error_endpoint_poweron; } + imx258->csi2_flags = ep.bus.mipi_csi2.flags; + /* Initialize subdev */ v4l2_i2c_subdev_init(&imx258->sd, client, &imx258_subdev_ops);