// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "ar9344.dtsi"
#include "ar934x_senao_loader.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	compatible = "araknis,an-300-ap-i-n", "qca,ar9344";
	model = "Araknis AN-300-AP-I-N";

	aliases {
		label-mac-device = &eth0;
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-upgrade = &led_power;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			linux,code = <KEY_RESTART>;
			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
			debounce-interval = <60>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power: power {
			label = "amber:power";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};

		wifi5g {
			label = "blue:wifi5g";
			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		wps {
			label = "blue:wps";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
		};
	};

	ath9k-leds {
		compatible = "gpio-leds";

		wifi2g {
			label = "blue:wifi2g";
			gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};
	};
};

&mdio0 {
	status = "okay";

	phy0: ethernet-phy@0 {
		reg = <0>;
		eee-broken-100tx;
		eee-broken-1000t;
	};
};

&eth0 {
	status = "okay";

	nvmem-cells = <&macaddr_art_0>;
	nvmem-cell-names = "mac-address";

	phy-handle = <&phy0>;
	phy-mode = "rgmii-txid";

	pll-data = <0x02000000 0x00000101 0x00001313>;
};

&pcie {
	status = "okay";

	ath9k: wifi@0,0,0 {
		compatible = "pci168c,0030";
		reg = <0x0 0 0 0 0>;
		nvmem-cells = <&macaddr_art_0>, <&calibration_art_5000>;
		nvmem-cell-names = "mac-address", "calibration";
		mac-address-increment = <1>;
		ieee80211-freq-limit = <2402000 2482000>;
		#gpio-cells = <2>;
		gpio-controller;
	};
};

&wmac {
	status = "okay";

	ieee80211-freq-limit = <4900000 5990000>;

	nvmem-cells = <&macaddr_art_0>, <&calibration_art_1000>;
	nvmem-cell-names = "mac-address", "calibration";
	mac-address-increment = <2>;
};

&art {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_art_0: macaddr@0 {
		reg = <0x0 0x6>;
	};

	calibration_art_1000: calibration@1000 {
		reg = <0x1000 0x440>;
	};

	calibration_art_5000: calibration@5000 {
		reg = <0x5000 0x440>;
	};
};