From be06181f45695ce71536ecb461615ebf6f18011e Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Tue, 15 Mar 2016 13:40:07 +0530 Subject: [PATCH 06/93] armv8: fsl-layerscape: Put SMMU config code in SMMU_BASE It is not mandatory for Layerscape SoCs to have SMMU. SoCs like LS1012A are layerscape SoC without SMMU IP. So put SMMU configuration code under SMMU_BASE. Signed-off-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 93f4a65..5f5bfb9 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -95,11 +95,13 @@ ENTRY(lowlevel_init) bl ccn504_set_qos #endif +#ifdef SMMU_BASE /* Set the SMMU page size in the sACR register */ ldr x1, =SMMU_BASE ldr w0, [x1, #0x10] orr w0, w0, #1 << 16 /* set sACR.pagesize to indicate 64K page */ str w0, [x1, #0x10] +#endif /* Initialize GIC Secure Bank Status */ #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) -- 1.7.9.5