From f10f009609aac0941d750ae3a1106675e6d6656a Mon Sep 17 00:00:00 2001 From: Zoltan Herpai Date: Wed, 27 Aug 2014 12:09:46 +0000 Subject: sunxi: initial 3.14 patchset Signed-off-by: Zoltan HERPAI SVN-Revision: 42313 --- .../115-dt-sun6i-fix-mod0-compat.patch | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 target/linux/sunxi/patches-3.14/115-dt-sun6i-fix-mod0-compat.patch (limited to 'target/linux/sunxi/patches-3.14/115-dt-sun6i-fix-mod0-compat.patch') diff --git a/target/linux/sunxi/patches-3.14/115-dt-sun6i-fix-mod0-compat.patch b/target/linux/sunxi/patches-3.14/115-dt-sun6i-fix-mod0-compat.patch new file mode 100644 index 0000000000..6b14459100 --- /dev/null +++ b/target/linux/sunxi/patches-3.14/115-dt-sun6i-fix-mod0-compat.patch @@ -0,0 +1,56 @@ +From 95c1fe603fbea0fd01d98262bd5ff7d5442a86db Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Mon, 24 Feb 2014 17:29:06 +0100 +Subject: [PATCH] ARM: sun6i: dt: Fix mod0 compatible + +The module 0 clock compatibles were changed between the time the patch was sent +and it was merged. Update the compatibles. + +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/sun6i-a31.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi +index af6f87c..42f310a 100644 +--- a/arch/arm/boot/dts/sun6i-a31.dtsi ++++ b/arch/arm/boot/dts/sun6i-a31.dtsi +@@ -200,7 +200,7 @@ + + spi0_clk: clk@01c200a0 { + #clock-cells = <0>; +- compatible = "allwinner,sun4i-mod0-clk"; ++ compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c200a0 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "spi0"; +@@ -208,7 +208,7 @@ + + spi1_clk: clk@01c200a4 { + #clock-cells = <0>; +- compatible = "allwinner,sun4i-mod0-clk"; ++ compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c200a4 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "spi1"; +@@ -216,7 +216,7 @@ + + spi2_clk: clk@01c200a8 { + #clock-cells = <0>; +- compatible = "allwinner,sun4i-mod0-clk"; ++ compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c200a8 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "spi2"; +@@ -224,7 +224,7 @@ + + spi3_clk: clk@01c200ac { + #clock-cells = <0>; +- compatible = "allwinner,sun4i-mod0-clk"; ++ compatible = "allwinner,sun4i-a10-mod0-clk"; + reg = <0x01c200ac 0x4>; + clocks = <&osc24M>, <&pll6>; + clock-output-names = "spi3"; +-- +2.0.3 + -- cgit v1.2.3