From d1ca9d207acc1056bd460f7cba2f50af87004f58 Mon Sep 17 00:00:00 2001 From: Zoltan HERPAI Date: Wed, 5 Feb 2014 08:42:28 +0000 Subject: sunxi: initial 3.13 support Signed-off-by: Zoltan HERPAI git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39471 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../146-1-dt-sun5i-a10s-add-hstimer.patch | 38 ++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch (limited to 'target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch') diff --git a/target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch b/target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch new file mode 100644 index 0000000000..afdaa5a248 --- /dev/null +++ b/target/linux/sunxi/patches-3.13/146-1-dt-sun5i-a10s-add-hstimer.patch @@ -0,0 +1,38 @@ +From 5ace5467690055b1772dcac69dd1377735b8a34b Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 7 Nov 2013 12:01:48 +0100 +Subject: [PATCH] ARM: sun5i: a10s: Add support for the High Speed Timers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The Allwinner A10s has support for two high speed timers. Now that we +have a driver to support it, we can enable them in the device tree. + +Signed-off-by: Maxime Ripard +Tested-by: Emilio López +Signed-off-by: Daniel Lezcano +--- + arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi +index b4764be..924a2c1 100644 +--- a/arch/arm/boot/dts/sun5i-a10s.dtsi ++++ b/arch/arm/boot/dts/sun5i-a10s.dtsi +@@ -336,5 +336,12 @@ + clock-frequency = <100000>; + status = "disabled"; + }; ++ ++ timer@01c60000 { ++ compatible = "allwinner,sun5i-a13-hstimer"; ++ reg = <0x01c60000 0x1000>; ++ interrupts = <82>, <83>; ++ clocks = <&ahb_gates 28>; ++ }; + }; + }; +-- +1.8.5.1 + -- cgit v1.2.3