From c94ca63ed4eed9aa92dc2fa4d61235b6845b42d3 Mon Sep 17 00:00:00 2001 From: Jan Hoffmann Date: Sat, 17 Dec 2022 21:39:40 +0100 Subject: realtek: don't set L2LEARNING flag in rtl83xx TX header As learning for the CPU port is now disabled globally, the bit in the TX header doesn't have any effect anymore. Remove it to make the header consistent with the global configuration. Originally, this change was intended to be applied before commit eb456aedfe24 ("realtek: use assisted learning on CPU port"), which is why the commit message incorrectly mentions that the TX header already disables learning. The reason for disabling learning on the CPU port in the first place is that it doesn't work correctly when packets are trapped to the CPU and then forwarded by the CPU to other ports. In that case, the switch would incorrectly learn the CPU port as source. An example that triggered this issue are Multicast Listener Reports and IGMP membership reports. Signed-off-by: Jan Hoffmann --- target/linux/realtek/files-5.15/drivers/net/ethernet/rtl838x_eth.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/linux/realtek/files-5.15') diff --git a/target/linux/realtek/files-5.15/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-5.15/drivers/net/ethernet/rtl838x_eth.c index 166e49e139..32de5cc554 100644 --- a/target/linux/realtek/files-5.15/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-5.15/drivers/net/ethernet/rtl838x_eth.c @@ -96,7 +96,7 @@ struct notify_b { static void rtl838x_create_tx_header(struct p_hdr *h, unsigned int dest_port, int prio) { // cpu_tag[0] is reserved on the RTL83XX SoCs - h->cpu_tag[1] = 0x0401; // BIT 10: RTL8380_CPU_TAG, BIT0: L2LEARNING on + h->cpu_tag[1] = 0x0400; // BIT 10: RTL8380_CPU_TAG h->cpu_tag[2] = 0x0200; // Set only AS_DPM, to enable DPM settings below h->cpu_tag[3] = 0x0000; h->cpu_tag[4] = BIT(dest_port) >> 16; @@ -111,7 +111,7 @@ static void rtl839x_create_tx_header(struct p_hdr *h, unsigned int dest_port, in { // cpu_tag[0] is reserved on the RTL83XX SoCs h->cpu_tag[1] = 0x0100; // RTL8390_CPU_TAG marker - h->cpu_tag[2] = BIT(4) | BIT(7); /* AS_DPM (4) and L2LEARNING (7) flags */ + h->cpu_tag[2] = BIT(4); /* AS_DPM flag */ h->cpu_tag[3] = h->cpu_tag[4] = h->cpu_tag[5] = 0; // h->cpu_tag[1] |= BIT(1) | BIT(0); // Bypass filter 1/2 if (dest_port >= 32) { -- cgit v1.2.3