From 9c2422709075196022fcbc2d0f5f83e01d02b951 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 13 Feb 2017 12:38:27 +0100 Subject: ramips: add v4.9 support NAND support is missing Signed-off-by: John Crispin --- .../patches-4.9/100-mt7621-core-detect-hack.patch | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 target/linux/ramips/patches-4.9/100-mt7621-core-detect-hack.patch (limited to 'target/linux/ramips/patches-4.9/100-mt7621-core-detect-hack.patch') diff --git a/target/linux/ramips/patches-4.9/100-mt7621-core-detect-hack.patch b/target/linux/ramips/patches-4.9/100-mt7621-core-detect-hack.patch new file mode 100644 index 0000000000..a3224fd72f --- /dev/null +++ b/target/linux/ramips/patches-4.9/100-mt7621-core-detect-hack.patch @@ -0,0 +1,61 @@ +There is a variant of MT7621 which contains only one CPU core instead of 2. +This is not reflected in the config register, so the kernel detects more +physical cores, which leads to a hang on SMP bringup. +Add a hack to detect missing cores. + +Signed-off-by: Felix Fietkau + +--- a/arch/mips/kernel/smp-cps.c ++++ b/arch/mips/kernel/smp-cps.c +@@ -56,6 +56,11 @@ static unsigned core_vpe_count(unsigned + return (cfg >> CM_GCR_Cx_CONFIG_PVPE_SHF) + 1; + } + ++bool __weak plat_cpu_core_present(int core) ++{ ++ return true; ++} ++ + static void __init cps_smp_setup(void) + { + unsigned int ncores, nvpes, core_vpes; +@@ -66,6 +71,8 @@ static void __init cps_smp_setup(void) + ncores = mips_cm_numcores(); + pr_info("%s topology ", cpu_has_mips_r6 ? "VP" : "VPE"); + for (c = nvpes = 0; c < ncores; c++) { ++ if (!plat_cpu_core_present(c)) ++ continue; + core_vpes = core_vpe_count(c); + pr_cont("%c%u", c ? ',' : '{', core_vpes); + +--- a/arch/mips/ralink/mt7621.c ++++ b/arch/mips/ralink/mt7621.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + + #include + +@@ -164,6 +165,20 @@ void __init ralink_of_remap(void) + panic("Failed to remap core resources"); + } + ++bool plat_cpu_core_present(int core) ++{ ++ struct cpulaunch *launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); ++ ++ if (!core) ++ return true; ++ launch += core * 2; /* 2 VPEs per core */ ++ if (!(launch->flags & LAUNCH_FREADY)) ++ return false; ++ if (launch->flags & (LAUNCH_FGO | LAUNCH_FGONE)) ++ return false; ++ return true; ++} ++ + void prom_soc_init(struct ralink_soc_info *soc_info) + { + void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE); -- cgit v1.2.3