From 55fb6f3a05deb4a8b5e600cc10bae9555a9f90be Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sun, 23 Jun 2013 15:50:49 +0000 Subject: ralink: update patches Signed-off-by: John Crispin SVN-Revision: 37016 --- ...S-ralink-add-memory-definition-for-RT2880.patch | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 target/linux/ramips/patches-3.9/0124-MIPS-ralink-add-memory-definition-for-RT2880.patch (limited to 'target/linux/ramips/patches-3.9/0124-MIPS-ralink-add-memory-definition-for-RT2880.patch') diff --git a/target/linux/ramips/patches-3.9/0124-MIPS-ralink-add-memory-definition-for-RT2880.patch b/target/linux/ramips/patches-3.9/0124-MIPS-ralink-add-memory-definition-for-RT2880.patch new file mode 100644 index 0000000000..43adf86a39 --- /dev/null +++ b/target/linux/ramips/patches-3.9/0124-MIPS-ralink-add-memory-definition-for-RT2880.patch @@ -0,0 +1,43 @@ +From 45529406ea5b481da5986e0a14ae26a8c103691b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 13 Apr 2013 15:37:37 +0200 +Subject: [PATCH 124/164] MIPS: ralink: add memory definition for RT2880 + +Populate struct soc_info with the data that describes our RAM window. + +Signed-off-by: John Crispin +Patchwork: http://patchwork.linux-mips.org/patch/5181/ +--- + arch/mips/include/asm/mach-ralink/rt288x.h | 4 ++++ + arch/mips/ralink/rt288x.c | 4 ++++ + 2 files changed, 8 insertions(+) + +diff --git a/arch/mips/include/asm/mach-ralink/rt288x.h b/arch/mips/include/asm/mach-ralink/rt288x.h +index ad8b42d..03ad716 100644 +--- a/arch/mips/include/asm/mach-ralink/rt288x.h ++++ b/arch/mips/include/asm/mach-ralink/rt288x.h +@@ -46,4 +46,8 @@ + + #define CLKCFG_SRAM_CS_N_WDT BIT(9) + ++#define RT2880_SDRAM_BASE 0x08000000 ++#define RT2880_MEM_SIZE_MIN 2 ++#define RT2880_MEM_SIZE_MAX 128 ++ + #endif +diff --git a/arch/mips/ralink/rt288x.c b/arch/mips/ralink/rt288x.c +index 1e0788e..f87de1a 100644 +--- a/arch/mips/ralink/rt288x.c ++++ b/arch/mips/ralink/rt288x.c +@@ -136,4 +136,8 @@ void prom_soc_init(struct ralink_soc_info *soc_info) + name, + (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK, + (id & CHIP_ID_REV_MASK)); ++ ++ soc_info->mem_base = RT2880_SDRAM_BASE; ++ soc_info->mem_size_min = RT2880_MEM_SIZE_MIN; ++ soc_info->mem_size_max = RT2880_MEM_SIZE_MAX; + } +-- +1.7.10.4 + -- cgit v1.2.3