From d7139c52f2d1321b3fd2cc8987ac77b3c795c5e2 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 9 Feb 2015 12:13:55 +0000 Subject: ralink: add 3.18 support keep default as 3.14, mt7621 gic need to be ported to 3.18 Signed-off-by: John Crispin git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44349 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../linux/ramips/patches-3.18/999-pci-reset.patch | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 target/linux/ramips/patches-3.18/999-pci-reset.patch (limited to 'target/linux/ramips/patches-3.18/999-pci-reset.patch') diff --git a/target/linux/ramips/patches-3.18/999-pci-reset.patch b/target/linux/ramips/patches-3.18/999-pci-reset.patch new file mode 100644 index 0000000000..6055731822 --- /dev/null +++ b/target/linux/ramips/patches-3.18/999-pci-reset.patch @@ -0,0 +1,35 @@ +--- a/arch/mips/ralink/reset.c ++++ b/arch/mips/ralink/reset.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -18,8 +19,10 @@ + #include + + /* Reset Control */ +-#define SYSC_REG_RESET_CTRL 0x034 +-#define RSTCTL_RESET_SYSTEM BIT(0) ++#define SYSC_REG_RESET_CTRL 0x034 ++ ++#define RSTCTL_RESET_PCI BIT(26) ++#define RSTCTL_RESET_SYSTEM BIT(0) + + static int ralink_assert_device(struct reset_controller_dev *rcdev, + unsigned long id) +@@ -83,6 +86,11 @@ void ralink_rst_init(void) + + static void ralink_restart(char *command) + { ++ if (IS_ENABLED(CONFIG_PCI)) { ++ rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL); ++ mdelay(50); ++ } ++ + local_irq_disable(); + rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL); + unreachable(); -- cgit v1.2.3