From 510ff1f1b8f7ee28986cb08381b02392847296ac Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 19 Nov 2014 09:19:38 +0000 Subject: ralink: merge the mt7620a/n subtargets Signed-off-by: John Crispin SVN-Revision: 43300 --- target/linux/ramips/patches-3.14/999-non-pci-mt7620.patch | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 target/linux/ramips/patches-3.14/999-non-pci-mt7620.patch (limited to 'target/linux/ramips/patches-3.14') diff --git a/target/linux/ramips/patches-3.14/999-non-pci-mt7620.patch b/target/linux/ramips/patches-3.14/999-non-pci-mt7620.patch new file mode 100644 index 0000000000..6a6f3279f6 --- /dev/null +++ b/target/linux/ramips/patches-3.14/999-non-pci-mt7620.patch @@ -0,0 +1,14 @@ +Index: linux-3.14.18/arch/mips/ralink/mt7620.c +=================================================================== +--- linux-3.14.18.orig/arch/mips/ralink/mt7620.c 2014-11-18 20:57:21.506801623 +0100 ++++ linux-3.14.18/arch/mips/ralink/mt7620.c 2014-11-18 22:12:05.133116492 +0100 +@@ -511,9 +511,6 @@ + ralink_soc = MT762X_SOC_MT7620N; + name = "MT7620N"; + soc_info->compatible = "ralink,mt7620n-soc"; +-#ifdef CONFIG_PCI +- panic("mt7620n is only supported for non pci kernels"); +-#endif + } + } else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) { + ralink_soc = MT762X_SOC_MT7628AN; -- cgit v1.2.3