From a0de18807ba35e1888f6ea8ada84695e46558262 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 15 Jul 2013 10:06:55 +0000 Subject: ramips: add ralink v3.10 support Signed-off-by: John Crispin SVN-Revision: 37331 --- .../0031-owrt-MIPS-add-OWRTDTB-secion.patch | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 target/linux/ramips/patches-3.10/0031-owrt-MIPS-add-OWRTDTB-secion.patch (limited to 'target/linux/ramips/patches-3.10/0031-owrt-MIPS-add-OWRTDTB-secion.patch') diff --git a/target/linux/ramips/patches-3.10/0031-owrt-MIPS-add-OWRTDTB-secion.patch b/target/linux/ramips/patches-3.10/0031-owrt-MIPS-add-OWRTDTB-secion.patch new file mode 100644 index 0000000000..77606cf385 --- /dev/null +++ b/target/linux/ramips/patches-3.10/0031-owrt-MIPS-add-OWRTDTB-secion.patch @@ -0,0 +1,61 @@ +From c174d2250e402399ad7dbdd57d51883d8804bba0 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 15 Jul 2013 00:40:37 +0200 +Subject: [PATCH 31/33] owrt: MIPS: add OWRTDTB secion + +Signed-off-by: John Crispin +--- + arch/mips/kernel/head.S | 3 +++ + arch/mips/ralink/Makefile | 2 +- + arch/mips/ralink/of.c | 4 +++- + 3 files changed, 7 insertions(+), 2 deletions(-) + +diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S +index c61cdae..b4e55bb 100644 +--- a/arch/mips/kernel/head.S ++++ b/arch/mips/kernel/head.S +@@ -140,6 +140,9 @@ FEXPORT(__kernel_entry) + j kernel_entry + #endif + ++ .ascii "OWRTDTB:" ++ EXPORT(__image_dtb) ++ .fill 0x4000 + __REF + + NESTED(kernel_entry, 16, sp) # kernel entry point +diff --git a/arch/mips/ralink/Makefile b/arch/mips/ralink/Makefile +index 03af636..9b32626 100644 +--- a/arch/mips/ralink/Makefile ++++ b/arch/mips/ralink/Makefile +@@ -19,4 +19,4 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-$(CONFIG_DEBUG_FS) += bootrom.o + +-obj-y += dts/ ++#obj-y += dts/ +diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c +index 2faf478..d87222f 100644 +--- a/arch/mips/ralink/of.c ++++ b/arch/mips/ralink/of.c +@@ -83,6 +83,8 @@ void __init device_tree_init(void) + //free_bootmem(base, size); + } + ++extern struct boot_param_header __image_dtb; ++ + void __init plat_mem_setup(void) + { + set_io_port_base(KSEG1); +@@ -91,7 +93,7 @@ void __init plat_mem_setup(void) + * Load the builtin devicetree. This causes the chosen node to be + * parsed resulting in our memory appearing + */ +- __dt_setup_arch(&__dtb_start); ++ __dt_setup_arch(&__image_dtb); + + if (soc_info.mem_size) + add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M, +-- +1.7.10.4 + -- cgit v1.2.3